參數(shù)資料
型號(hào)： UAA1570HL
廠商： NXP SEMICONDUCTORS
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Global Positioning System (GPS)baseband processor(通用定位系統(tǒng)基帶處理器)
中文描述： SPECIALTY TELECOM CIRCUIT, PQFP48
封裝： PLASTIC, SOT-313, LQFP-48
文件頁(yè)數(shù)： 13/76頁(yè)
文件大?。?/td> 890K
代理商： UAA1570HL
1999 May 10
13
Philips Semiconductors
Product specification
Global Positioning System (GPS) front-end
receiver circuit
UAA1570HL
7.1
Low noise amplifiers LNA1 and LNA2
Two identical LNAs are provided on the IC although LNA1
need not be biased, if sufficient external gain is provided
by an external LNA. The input stage of each amplifier
consists of an unbalanced common emitter and a cascode
stage. The AC-coupled output stage is a compound
feedback bootstrap amplifier. Each stage is independently
biased and regulated. LNA1 can be disabled by
connecting the respective supply (pin 43) to ground. LNA2
has to be powered-up even if not used.
Each LNA can supply a power matched gain of
approximately 15.5 dB with an associated noise figure of
3.7 dB.
Both LNAs have
1 dB input compression points of
approximately
22 dBm from a 3 V supply. The 2nd and
3rd-order input intercepts are approximately
7.9 and
13 dBm, respectively, in a power matched
environment.
The RF match impedances at L1 (1.57542 GHz) are
provided in Table 1 for all RF inputs and outputs.
Table 1
RF matching impedances
PIN
REAL PART
(
)
31
77.5
24
74.5
33.5
IMAGINARY
PART (
)
j32
+j6
j25
j0.5
j25.5
FUNCTION
45
48
3
6
14
LNA1 input
LNA1 output
LNA2 input
LNA2 output
1st mixer input
These RF port impedances are marked on the following
Smith charts (see Figs 4 to 8; normalized to 50
) and
suggested matching structure netlists are provided. They
contain transmission lines defined by their characteristic
impedance Z (in ohms), their electrical length E (in
degrees) and the operating frequency f (in GHz).
Capacitors C are given in pF. TLIN is a series
transmission line and TLOC is an open-circuit stub
transmission line. Node 1 is the UAA1570HL RF port
being matched and Node 0 is ground. These matching
networks are structurally identical to those illustrated on
the GPS application block diagram, however, the
component values in the application diagram are
somewhat different to account for stray capacitances and
other real world influences. The netlists are derived from
EEZMATCH software (Besser Associates, Los Altos, CA,
USA).
Generally, we assume a minimum shunt capacitance, due
to the IC pin pad and adjacent pin strays, of approximately
0.25 pF as an initial stray element in the netlist below, that
will always be present in the matching structure design.
This value should be re-estimated and matched if the
layout introduces significant additional strays at the pin
pads.
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