
PRODUCT SPECIFICATION
TMC2192
33
P
Read from four consecutive control registers
 Start signal
 Slave Address byte (R/W bit = LOW)
 Block Pointer (00)
 Offset Pointer
 Stop signal
 Start signal
 Slave Address byte (R/W bit = HIGH)
 Data byte from base address
 Data byte from (base address + 1)
 Data byte from (base address + 2)
 Data byte from (base address + 3)
 NOACK
Control Register Map
Table 22. Control Register Map 
Reg Bit
Mnemonic
Function
TMC2192 Identification Registers (Read only)
7-0
PARTID2
Reads back 97h
7-0
PARTID1
Reads back 21h
7-0
PARTID0
Reads back 92h
7-0
REVID
Silicon revision #
Gamma Filters Register
7-4
Reserved
Set to Low
3
SRESET
Software RESET
2
SKEN
Data KEY Enable
1-0
PDRM
Pixel Data Ramping Mode
Input Format Register
7
D1OFF
YCBCR Input Formatting
6
Reserved
Program Low
5-4
INMODE
Input Mode Select
3-2
OMIX
Overlay Mixer Select
1-0
SOURCE
Video Input Select
General Control Register
7-6
FORMAT
Video Format
5-3
MODE
Video Mode
2
PDCDIR
PDC Directional Control
1
TOUT
External Sync Output Control
0
TSOUT
External Sync Delay Control
Horizontal Ancillary Data Control Register
7
LDFID
Field Lock Select
6
SKFLIP
Soft Key Inversion
5
DDSRST
DDS Reset
4-3
Reserved
2
ANCFREN
Ancillary Frequency Enable
1
ANCPHEN
Ancillary Phase Enable
0
ANCTREN
Ancillary Timing Enable
Ancillary Data ID Register
7-0
ANCID
Ancillary Data Identification
Keying/Overlay Engine
7
HKEN
Hardware KEY Enable
00
01
02
03
04
04
04
04
05
05
05
05
05
06
06
06
06
06
07
07
07
07
07
07
07
08
09
09
09
09
09
09
09
6
5
4
3
2
BUKEN
SKEXT
DKDIS
EKDIS
FKDIS
LAYMODE
Burst KEY Enable
Data KEY Operation Select
Green/Y Data KEY Disable
Blue/C
B
 Data KEY Disable
Red/C
R
 Data KEY Disable
Layer Assignment Select
Key Value Registers
7-0 DKEYMAX
Green/Y Maximum Data Key 
Value
7-0 DKEYMIN
Green/Y Minimum Data Key 
Value
7-0 EKEYMAX
Blue/C
B
 Maximum Data Key 
Value
7-0 EKEYMIN
Blue/C
B
 Minimum Data Key 
Value
7-0 FKEYMAX
Red/C
R
 Maximum Data Key 
Value
7-0 FKEYMIN
Red/C
R
 Minimum Data Key 
Value
DAC Control Registers
7
COMPDIS
D/A #4 Disable
6
CHROMADIS
D/A #3 Disable
5
LUMADIS
D/A #2 Disable
4-3
Reserved
Set to 0.
2
OLUTDIS
Overlay LUT Disable
1-0
Reserved
Program Low
7
DRSSEL
DRS Selection
6
Reserved
Program Low
5
COMP2DB
Composite 2 Overflow Control
4
SINEN
X/Sin(x) Filter Enable
3
Reserved
Program Low
2
LUMDIS
Luma Disable
1
CHRMDIS
Chroma Disable
0
BURSTDIS
Burst Disable
1-0
0A
0B
0C
0D
0E
0F
10
10
10
10
10
10
11
11
11
11
11
11
11
11
Table 22. Control Register Map 
(continued)
Reg Bit
Mnemonic
Function