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參數(shù)資料
| 型號： | TMC2192 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 10 Bit Video Encoder(10位視頻編碼器) |
| 中文描述： | 10位視頻編碼器（10位視頻編碼器） |
| 文件頁數(shù)： | 13/72頁 |
| 文件大?。?/td> | 396K |
| 代理商： | TMC2192 |
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PRODUCT SPECIFICATION
TMC2192
13
P
Figure 8. Horizontal Timing
Vertical interval timing is also fully programmable, and is
established by loading the timing registers with the dura-
tion’s of each vertical timing element, the duration expressed
in PCK clock cycles. In this way as with horizontal program-
ming, any pixel rate between 10 and 15 Mpps can be accom-
modated, and any desired standard or non-standard vertical
video timing may be produced.
Like horizontal timing parameters, vertical timing parame-
ters are calculated as follows:
t = N x ( PCK period )
= N x ( 2 x PXCK period )
where N is the value loaded into the appropriate timing reg-
ister, and PCK is the pixel clock period.
The vertical interval comprises several different line types
based upon H, the Horizontal line time.
H = (2 x SL) + (2 x SH) [Vertical sync pulses]
= (2 x EL) + (2 x EH) [Equalization pulses]
Figure 9. Horizontal Timing – Vertical Blanking
The VB and VC control registers are added to produce the
half-lines needed in the vertical interval at the beginning and
end of some fields. These must properly mate with compo-
nents of the normal lines.
BR
BU
CBP
VA
FP
65-6294-10
SY
Table 5. Horizontal Timing Specifications
Parameter
FP
SY
BR
BU
CBP
VA
H
NTSC-M
(
m
s)
1.5
4.7
0.6
2.5
1.6
52.6556
63.5556
PAL-I
(
m
s)
1.65
4.7
0.9
2.25
2.55
51.95
64.0
PAL-M
(
m
s)
1.9
4.95
0.9
2.25
1.8
51.692
63.492
EL
H/2
H
EH
SL
SH
65-6294-11
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMC2192KHC | 功能描述:視頻 IC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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