參數(shù)資料
型號： TMC2081
廠商： Fairchild Semiconductor Corporation
英文描述： Digital Video Mixer(數(shù)字視頻混頻器)
中文描述： 數(shù)字視頻混合器（數(shù)字視頻混頻器）
文件頁數(shù)： 9/32頁
文件大?。?/td> 158K
代理商： TMC2081
PRODUCT SPECIFICATION
TMC2081
9
As shown in Table 14, to access a control register, Control
Address Register bits D
3-0
must be set to specify one of the
nine control registers shown in Table 17. For access to LUTs
and Overlay palettes, Control Address Register bits D
7-6
must be set to select the address of one of the four RAMs
shown in Table 14.
Table 14. Control Address Register Bit
Definitions
Figure 4 and Figure 5 show the microprocessor port read and
write timing cycles. Table 15 shows the Control Register
read and write sequences.
When loading or reading look-up tables or the overlay pal-
ette, with the exception of
a
-LUT write, the address pointer
is auto-incremented after each read or write operation. For
a
-LUT write, the address pointer is pre-incremented, so that
the address must be set one address before the required
address. For
a
-LUT read, the address pointer is post-
incremented.
RAM Select Reserved Control Register Address
D
7
D
6
D
5
D
4
00
A-channel CLUT
01
A-channel Overlay palette
10
11
D
3
D
2
D
1
D
0
Reserved
a
LUT
When accessing the A-channel CLUT, or A-channel Overlay
palette, each address location must be written/read three con-
secutive times for red (R/C
R
), green (G/Y), and blue (B/C
B
)
data. After accessing the blue data, the address pointer auto-
increments.
In Table 16, note that:
1.
To read the
a
-LUT, Control Register 06h, bit 5 must be
set to enable the
a
-LUT.
2.
To read the CLUT and Overlay Table, Control Register
00h, bit 4 (CLUT) must be set to enable both the CLUT
and Overlay Table.
3.
Data may be written to the CLUT or
a
LUT with Control
Register bits set to enable or bypass.
4.
When writing to the
a
-LUT, the address pre-increments.
The address pointer is set to FFh, one address before
address 00h.
5.
Load mask register to pass PDA data.
Power and Ground
The TMC2081 operates from a single +5 Volt power supply.
Multiple power and ground pins are assigned and must be
connected.
Table 15. Control Register Read/Write Sequences
Step
Write to all Control Registers
1
0
R/W
A
2-0
D
7-0
Function
111
x0
Writes 0 to Address Control Register (selects the A-channel Control
Register)
Writes aa into A-channel Control Register
Repeat steps 1 and 2 incrementing data to Address Control Register
Writes 07 to Address Control Register (selects the D/A Control Register)
Writes bb into D/A Control Register
2
.
15
16
0
. .
0
0
101
. .
111
101
aa
. .
07
bb
Read/Modify/Write Mixer Control Register
1
0
111
x2
Writes 02 to Address Control Register (selects the Mixer Control
Register)
Mixer Control Register contents, aa, available on D
7-0
.
System modifies aa to get bb.
Writes bb into Mixer Control Register
2
.
3
1
. .
0
101
. .
101
aa
. .
bb
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