參數(shù)資料
型號(hào)： TLV4112CDGN
元件分類： TVS-瞬態(tài)抑制二極管
英文描述： Transient Voltage Suppressor Diodes
中文描述： 電壓反饋運(yùn)算放大器
文件頁(yè)數(shù)： 15/22頁(yè)
文件大?。?/td> 388K
代理商： TLV4112CDGN
TLV4110, TLV4111, TLV4112, TLV4113
FAMILY OF HIGH OUTPUT DRIVE OPERATIONAL
AMPLIFIERS WITH SHUTDOWN
SLOS289B – DECEMBER 1999 – REVISED DECEMBER 2000
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
general PowerPAD design considerations (continued)
1.
Prepare the PCB with a top side etch pattern as shown in Figure 28. There should be etch for the leads as
well as etch for the thermal pad.
2.
Place five holes (dual) or nine holes (quad) in the area of the thermal pad. These holes should be 13 mils
in diameter. Keep them small so that solder wicking through the holes is not a problem during reflow.
3.
Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps
dissipate the heat generated by the TLV411x IC. These additional vias may be larger than the 13-mil
diameter vias directly under the thermal pad. They can be larger because they are not in the thermal pad
area to be soldered so that wicking is not a problem.
4.
Connect all holes to the internal ground plane.
5.
When connecting these holes to the ground plane,
do
not
use the typical web or spoke via connection
methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat
transfer during soldering operations. This makes the soldering of vias that have plane connections easier.
In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore,
the holes under the TLV411x PowerPAD package should make their connection to the internal ground plane
with a complete connection around the entire circumference of the plated-through hole.
6.
The top-side solder mask should leave the terminals of the package and the thermal pad area with its five
holes (dual) or nine holes (quad) exposed. The bottom-side solder mask should cover the five or nine holes
of the thermal pad area. This prevents solder from being pulled away from the thermal pad area during the
reflow process.
7.
Apply solder paste to the exposed thermal pad area and all of the IC terminals.
8.
With these preparatory steps in place, the TLV411x IC is simply placed in position and run through the solder
reflow operation as any standard surface-mount component. This results in a part that is properly installed.
For a given
θ
JA
, the maximum power dissipation is shown in Figure 30 and is calculated by the following formula:
PD
TMAX–TA
JA
Where:
P
D
T
MAX
= Absolute maximum junction temperature (150
°
C)
T
A
= Free-ambient air temperature (
°
C)
θ
JA
=
θ
JC
+
θ
CA
θ
JC
= Thermal coefficient from junction to case
θ
CA
= Thermal coefficient from case to ambient air (
°
C/W)
= Maximum power dissipation of TLV411x IC (watts)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV4112CDGNG4 功能描述:運(yùn)算放大器 - 運(yùn)放 High-Output-Drive Op Amp RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
TLV4112CDGNR 制造商:Rochester Electronics LLC 功能描述:- Bulk
TLV4112CDR 制造商:Rochester Electronics LLC 功能描述:HIGH DRIVE,RRO,DUAL OP AMP - Bulk
TLV4112CP 功能描述:運(yùn)算放大器 - 運(yùn)放 High-Output-Drive Op Amp RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
TLV4112CPE4 功能描述:運(yùn)算放大器 - 運(yùn)放 High-Output-Drive Op Amp RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
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