參數(shù)資料
型號(hào)： TLE7368G
廠商： INFINEON TECHNOLOGIES AG
元件分類： 電源管理
英文描述： 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO36
封裝： PLASTIC, SOP-36
文件頁(yè)數(shù)： 28/39頁(yè)
文件大?。?/td> 932K
代理商： TLE7368G
TLE7368
Application Information
Data Sheet
34
Rev. 1.1, 2007-11-08
This section intends to give hints for correct set up of the IC, i.e. to avoid misbehavior caused by the influence of
other PCB board circuits and shows also how to calculate external components, power loss, etc.
6.1
Choosing Components for the Buck Regulator
Stable operation of the Buck converter is ensured when choosing the external passive components according to
the characteristics given below:
Buck inductance: 18
H < LBuck < 220 H
Buck output capacitor:
C
Buck > 20 F
ESR of Buck output capacitor: ESR_
C
Buck < 150 m
6.2
Setting up LDO1, LDO2
The linear regulators LDO1 and LDO2 need to be connected to appropriate output capacitors in order to keep the
regulation loop stable and avoid oscillations. The essential parameters of the output capacitor are the minimum
capacitance and the equivalent series resistance (ESR). The required ranges for each output are specified in
Chapter 4.4 (Electrical Characteristics). Tantalum capacitors as well as multi layer ceramic capacitors are
suitable for LDO1 and LDO2.
6.3
Setting up of LDO3
LDO3 consists of an integrated regulator which needs to be equipped with an external power transistor (NPN-
Type). Suitable NPN power transistors types are e.g. KSH 200 from Fairchild semiconductor or NJD 2873T4 from
ON semiconductor. The most important parameters to be checked when choosing the external transistor are the
‘current gain bandwidth product’ (
f
T), the ‘DC current gain’ (hFE) and the thermal resistance of the package.
Darlington type transistors should not be used. For stability of the regulation loop a multi layer ceramic capacitor
of min. 4.7
F must be connected to the LDO3 output voltage (Emitter of the external power transistor). In order
to improve suppression load current steps an additional capacitor of tantalum type can be connected in parallel.
In case LDO3 voltage is not needed the external NPN transistor can be spared. For this configuration the pins
‘DRV_EXT’ and ‘FB_EXT’ should be directly connected to each other in order to ensure correct operation of
Reset 2. Also in this case a small ceramic capacitor of 220 nF connected from pin ‘FB_EXT’ to GND is
recommended in order to avoid oscillations of the regulation loop LDO3.
Table 1
LDO2 Output Voltage Configuration
No.
SEL_LDO2
Q_LDO2
1
GND
2.6 V
2
Q_LDO2
3.3 V
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