參數(shù)資料
型號(hào): TLE7368G
廠商: INFINEON TECHNOLOGIES AG
元件分類(lèi): 電源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO36
封裝: PLASTIC, SOP-36
文件頁(yè)數(shù): 18/39頁(yè)
文件大?。?/td> 932K
代理商: TLE7368G
Data Sheet
25
Rev. 1.1, 2007-11-08
TLE7368
Detailed Internal Circuits Description
5.4
Power Up and Power Down Sequencing
In a supply system with multiple outputs the sequence of enabling the individual regulators is important. Especially
32-bit microcontrollers require a defined power up and power down sequencing. Figure 4 shows the details for
the power up and power down sequence of the TLE7368.
At power up, the first circuit block to be enabled is the charge pump as it is mandatory for the other circuits to
operate. With the charge pump reaching its nominal value, the Buck converter starts to power up its output. Also
the output voltage the linear regulators are enabled. The three linear regulators power up simultaneously. The 5 V
regulator acts as the master, the 3.3 V/2.6 V regulator and the 1.5 V regulator follow. As the 5 V regulator powers
up also the tracking regulators follow. The ramp if the increasing output voltage of each line is determined by the
connected output capacitance, the load current and the current limit of the regulator under consideration. In
addition an integrated supervision circuit ensures the following two conditions during power-up:
-0.3 V < (
V
Q_LDO1 - VQ_LDO2) < 3.1 V and
(1)
-0.3 V < (
V
Q_LDO2 - VFB_EXT)
(2)
The power down sequence is practically vice versa to the start up procedure. With the battery decreasing to zero
the charge pump and Buck regulator will stop to operate at the minimum battery threshold, the Buck output voltage
will fall down and so will the outputs of the linear regulators.
In the event where the device is disabled, EN_IGN = low and EN_uC = low, the charge pump, the Buck converter
and the linear regulators are disabled immediately.
The linear regulators’ outputs are not discharged actively in any case of power down. Diode circuitry (i.e. Schottky
diodes) might be necessary to avoid violation of certain microcontrollers’ sequencing requirements.
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