參數(shù)資料
型號： TLC320AD90CPMR
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： PLASTIC, LQFP-64
文件頁數(shù)： 19/51頁
文件大?。?/td> 227K
代理商： TLC320AD90CPMR
2–12
NOTE:
Power-on self-test (POST) codes need to be heard by the user when a hardware
problem with the PC exists, even when the TLC320AD90C is in a reset state.
Therefore, PC_BEEP is routed to the left and right line outputs (a high-impedance
path to the outputs is used with no attenuation).
The default value of this register is 0000h which corresponds to 0-dB attenuation with mute off. The
PC_BEEP register definitions are listed in Table 2–7.
Table 2–7. PC_BEEP Register Definitions
MUTE
PV3 – PV0
FUNCTION
0000
0-dB Attenuation
0
...
1111
45-dB Attenuation
1
xxxx
Maximum attenuation (mute)
2.3.4
Analog Mixer Input Gain Registers (Index 0Ch – 18h)
The Analog Mixer Input Gain registers (Phone Volume, Mic Volume, Line In Volume, CD Volume, Video
Volume, Aux Volume, PCM Out Volume) control the gain and attenuation for each of the analog inputs
except PC_BEEP. Each step corresponds to approximately 1.5 dB. The MSB of each register is the mute
bit. When this bit is set to 1, the level for that channel is set at maximum attenuation.
Register 0Eh (Mic Volume register) has an extra bit for a 20-dB boost. When bit D6 is set to 1, the 20-dB
boost is on. The default value of this register is 8008h which corresponds to 0-dB gain with mute on.
The default value for the mono (Phone Volume, Mic Volume) registers is 8008h which corresponds to 0-dB
gain with mute on. The default value for the stereo registers is 8808h which corresponds to 0-dB gain with
mute on. The Analog Mixer Input Gain register definitions are listed in Table 2–8.
Table 2–8. Analog Mixer Input Gain Register Definitions
MUTE
Gx4 – Gx0
FUNCTION
0 0000
12-dB Gain
...
0
0 1000
0-dB Gain
...
1 1111
–34.5-dB Gain
1
x xxxx
Maximum attenuation (mute)
2.3.5
Record Select Control Register (Index 1Ah)
The Record Select Control registers are used to select the record source, independently, for the right and
left channels. See Tables 2–9 and 2–10 for the legend.
The default value of this register is 0000h which corresponds to MIC_IN. The Record Select Control register
definitions are listed in Tables 2–9 and 2–10.
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