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參數(shù)資料
| 型號： | TL16C552AHV |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO |
| 中文描述： | 雙異步通信元帶有FIFO |
| 文件頁數(shù)： | 7/39頁 |
| 文件大?。?/td> | 545K |
| 代理商： | TL16C552AHV |
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TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage, VDD
Clock high-level input voltage, VIH(CLK)
Clock low-level input voltage, VIL(CLK)
High-level input voltage, VIH
Low-level input voltage, VIL
Clock frequency, fclock
4.75
5
5.25
V
2
VDD
0.8
V
0
V
2
VDD
0.8
V
0
V
16
MHz
Operating free air temperature TA
Operating free-air temperature, TA
I suffix
–40
85
°
C
M suffix
–55
125
package thermal characteristics
PARAMETER
TEST CONDITIONS
FN Package
MIN
HV Package
MIN
UNIT
TYP
MAX
TYP
MAX
R
θ
JA
R
θ
JC
TJ
Junction-to-ambient thermal impedance
Board mounted, no air flow
52
74
°
C/W
°
C/W
°
C/W
Junction-to-case thermal impedance
14
3
Junction temperature
115
150
electrical characteristics over recommended ranges of operating free-air temperature and supply
voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
VOH
High-level output voltage
IOH = –12 mA for PD0–PD7,
IOH = –4 mA for all other outputs (see Note 2),
IOL = 12 mA for PD0–PD7,
IOL = 12 mA for INIT, AFD, STB, and SLIN,
IOL = 4 mA for all other outputs
VDD = 5.25 V (see Note 3),
All other terminals are floating
2.4
V
VOL
Low-level output voltage
0.4
V
II
Input current
±
10
μ
A
II(CLK)
Clock input current
VI = 0 to 5.25 V
VDD= 5 25 V
VDD = 5.25 V,
VO = 5 25 V with chip and write mode selected (see Note 2)
±
10
μ
A
VO= 0 with chip deselected or
VO = 0 with chi deselected or
IOZ
High-impedance output current
High im edance out ut current
±
20
μ
A
VDD = 5.25 V,
Inputs at 0 8 V or 2 V
In uts at 0.8 V or 2 V,
5 25 V
No loads on outputs,
fclock= 8 MHz
fclock = 8 MHz
IDD
Supply current
50
mA
NOTES:
2. Excluding INIT, AFD, STB, and SLIN. They are open-drain terminals with an internal pullup resistor to VDD of approximately 10 K
.
3. Excluding the TRI input terminal. It contains an internal pulldown resistor of approximately 5 k
.
clock timing requirements over recommended ranges of operating free-air temperature and supply
voltage
MIN
MAX
UNIT
tw1
tw2
tw3
Pulse duration, CLK
↑
(external clock) (see Figure 1)
Pulse duration, CLK
↓
(external clock) (see Figure 1)
Pulse duration, RESET
31
ns
31
ns
1000
ns
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| TL16C552AIFN | 功能描述:UART 接口集成電路 Dual UART w/16-Byte FIFOs & Para Port RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| TL16C552AIFNG4 | 功能描述:UART 接口集成電路 Dual UART w/ 16-Byte FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| TL16C552AM | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO |
| TL16C552AMFN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO |
| TL16C552AMHV | 制造商:Texas Instruments 功能描述:UART 2-CH 16Byte FIFO 5V 68-Pin CFPAK Tube 制造商:Rochester Electronics LLC 功能描述:DUAL 550 UART WITH CENTRONIX PORT - Bulk |
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