參數(shù)資料
型號: TL16C552AHV
廠商: Texas Instruments, Inc.
英文描述: DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO
中文描述: 雙異步通信元帶有FIFO
文件頁數(shù): 26/39頁
文件大?。?/td> 545K
代理商: TL16C552AHV
TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
26
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
register 2 line printer control register
The line printer control (LPC) register is a read/write port that controls the PD0–PD7 direction and drives the
printer control lines. Write operations set or clear these bits, whereas read operations return the state of the last
write operation to this register. The bits in this register are defined in Table 8 and the following bulleted list.
Table 8. LPC Register Bit Description
BIT
DESCRIPTION
0
STB
1
AFD
2
INIT
3
SLIN
4
INT2 EN
5
DIR
6
Reserved 0
7
Reserved 0
Bit 0: STB is the printer strobe control bit. When STB is set, the STB signal is asserted on the LPT interface.
When STB is cleared, the STB signal is negated.
Bit 1: AFD is the autofeed control bit. When AFD is set, the AFD signal is asserted on the LPT interface.
When AFD is cleared, the signal is negated.
Bit 2: INIT is the initialize printer control bit. When INIT is set, the INIT signal is negated. When INIT is
cleared, the INIT signal is asserted on the LPT interface.
Bit 3: SLIN is the select input control bit. When SLIN is set, the SLIN signal is asserted on the LPT interface.
When SLIN is cleared, the signal is negated.
Bit 4: INT2 EN is the interrupt request enable control bit. When set, INT2 EN enables interrupts from the
LPT port. When cleared, INT2 EN disables interrupts and places INT2 signal in the high-impedance state.
Bit 5: DIR is the direction control bit which is only used when PEMD is high. When DIR is set, the output
buffers in the LPD port are disableded to allow data driven from external sources to be read from the LPD
port. When DIR is cleared, the LPD port is in the output mode.
Bits 6 and 7: These bits are reserved and are always cleared.
相關(guān)PDF資料
PDF描述
TL16C552AMFN DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO
TL16C554AI ASYNCHRONOUS-COMMUNICATIONS ELEMENT
TL16C554I ASYNCHRONOUS COMMUNICATIONS ELEMENT
TL2575-15I 1-A SIMPLE STEP-DOWN SWITCHING VOLTAGE REGULATORS
TL2575-33I 1-A SIMPLE STEP-DOWN SWITCHING VOLTAGE REGULATORS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TL16C552AIFN 功能描述:UART 接口集成電路 Dual UART w/16-Byte FIFOs & Para Port RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
TL16C552AIFNG4 功能描述:UART 接口集成電路 Dual UART w/ 16-Byte FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
TL16C552AM 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO
TL16C552AMFN 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO
TL16C552AMHV 制造商:Texas Instruments 功能描述:UART 2-CH 16Byte FIFO 5V 68-Pin CFPAK Tube 制造商:Rochester Electronics LLC 功能描述:DUAL 550 UART WITH CENTRONIX PORT - Bulk