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參數(shù)資料
| 型號(hào)： | TDA8752BH |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Triple high-speed Analog-to-Digital Converter 110 Msps ADC |
| 中文描述： | 三高速模擬數(shù)字轉(zhuǎn)換器110 MSPS的ADC的 |
| 文件頁數(shù)： | 26/36頁 |
| 文件大?。?/td> | 154K |
| 代理商： | TDA8752BH |
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2000 Jan 10
26
Philips Semiconductors
Preliminary specification
Triple high-speed Analog-to-Digital
Converter 110 Msps (ADC)
TDA8752B
t
d(CLKO)
delay from CKEXT to
CKADCO
INV set to LOW
9.5
10.1
10.7
ns
INV set to HIGH
ns
t-t
d(CLKO
)
between samples operated in
the same supply and
temperature conditions
0.1
0.3
ns
Data timing
(see Fig.11)
; f
CLK
= 110 MHz; C
L
= 10 pF;
note 2
t
d(s)
t
d(o)
t
h(o)
sampling delay time
referenced to CKADCO
2
1.5
ns
output delay time
ns
output hold time
1.5
2.3
ns
3-state output delay time;
(see Fig.12)
t
dZH
t
dZL
t
dHZ
t
dLZ
output enable HIGH
12
ns
output enable LOW
10
ns
output disable HIGH
50
ns
output disable LOW
65
ns
PLL clock output
V
OL
V
OH
I
OL
I
OH
LOW-level output voltage
I
o
= 1 mA
I
o
=
1 mA
V
OL
= 0.4 V
V
OH
= 2.7 V
0.3
0.4
V
HIGH-level output voltage
2.4
3.5
V
LOW-level output current
2
mA
HIGH-level output current
0.4
mA
ADC data outputs
V
OL
V
OH
I
OL
I
OH
LOW-level output voltage
I
o
= 1 mA
I
o
=
1 mA
V
OL
= 0.4 V
V
OH
= 2.7 V
0
0.4
V
HIGH-level output voltage
2.4
V
CCD
2
V
LOW-level output current
mA
HIGH-level output current
0.4
mA
TTL digital inputs (CKREF, COAST, CKEXT, INV, HSYNC and CLP)
V
IL
V
IH
I
IL
I
IH
Z
i
C
i
LOW-level input voltage
0.8
V
HIGH-level input voltage
2.0
V
LOW-level input current
V
IL
= 0.4 V
V
IH
= 2.7 V
400
μ
A
μ
A
k
HIGH-level input current
100
input impedance
4
input capacitance
4.5
pF
3-wire serial bus
t
rst
reset time of the chip before
3-wire communication
data set-up time
600
ns
t
su
t
h
100
ns
data hold time
100
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
10.1
t
----2
+
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| TDA8752BH/8 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Triple high-speed Analog-to-Digital Converter 110 Msps ADC |
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