- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368630 > TDA8752BH (NXP Semiconductors N.V.) Triple high-speed Analog-to-Digital Converter 110 Msps ADC PDF資料下載
參數(shù)資料
| 型號(hào)： | TDA8752BH |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Triple high-speed Analog-to-Digital Converter 110 Msps ADC |
| 中文描述： | 三高速模擬數(shù)字轉(zhuǎn)換器110 MSPS的ADC的 |
| 文件頁數(shù)： | 13/36頁 |
| 文件大小： | 154K |
| 代理商： | TDA8752BH |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
2000 Jan 10
13
Philips Semiconductors
Preliminary specification
Triple high-speed Analog-to-Digital
Converter 110 Msps (ADC)
TDA8752B
The clock output is able to drive an external 10 pF load (for the on-chip ADCs).
The PLL can be used in three different methods:
1.
The IC can be used as stand-alone with a sampling frequency of up to 110 MHz for the TDA8752B/8.
2.
When an RGB signal is at a pixel frequency exceeding 100 to 200 MHz, it is possible to follow one of the two
possibilities given below:
a) Using one TDA8752B; the sampling rate can be reduced by a factor of two, by sampling the even pixels in the
even frame and the odd pixels in the odd frame. The INV pin is used to toggle between frames.
b) Using two TDA8752Bs the PLL of the master TDA8752B is used to drive both ADC clocks. The PLL of the slave
TDA8752B is disconnected and the CKBO of the master TDA8752B is connected to pin CKEXT of the TDA8752B
master and CKAO to the slave TDA8752B. In this case, on the CKAO pin CKBO will be the output (with bit CKAB
of the master at logic 1)
The master TDA8752B is used to sample the even pixels and the slave TDA8752B for odd pixels, using a 180
°
phase shift between the clocks (CKADCO pins). The master chip and the slave chip have their INV pin LOW,
which guarantees the 180
°
shift ADC clock drive. It is then necessary to adjust phase B of the master chip.
Special care should be taken with the quality of the input signal (input setting time).
If CKREFO output signal at the master chip is needed, it is possible to use one of the two phase A values in order
to avoid set-up and hold problems in the SYNCHRO function; e.g. PHASEA = 100000 and PHASEA = 111111.
3.
When INV is LOW, CKADCO is equal to CKEXT inverted.
tCKAO
tCKREFO
8 clock periods
FCE470
CKAO
CKREFO
Fig.5 Timing.
t
CKAO
= t
CLK(buffer)
+ t
phase selector
[t
CLK(buffer)
= 10 ns and t
phase selector
=
×
T
CLK(pixel)
].
t
CKREFO
= either t
CKAO
if phase A
≥
01000 or t
CKAO
+
if phase A < 01000.
phase selector
2
π
t
T
-----------2
T
-----------2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TDA8753 | YUV 8-bit analog-to-digital interface |
| TDA8753A | YUV 8-bit analog-to-digital interface |
| TDA8758 | YC8-bit Video Low-Power Analog-to-Digital Interface(YC8位視頻低功耗模數(shù)接口) |
| TDA8758G | YC 8-bit low-power analog-to-digital video interface |
| TDA8763AM | 10-bit high-speed low-power ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA8752BH/8 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Triple high-speed Analog-to-Digital Converter 110 Msps ADC |
| TDA8752H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Triple high speed Analog-to-Digital Converter ADC |
| TDA8752H/6 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Triple high speed Analog-to-Digital Converter ADC |
| TDA8752H/8 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Triple high speed Analog-to-Digital Converter ADC |
| TDA8753 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:YUV 8-bit analog-to-digital interface |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。