參數(shù)資料
型號(hào): TC9331F
元件分類(lèi): 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁(yè)數(shù): 10/31頁(yè)
文件大?。?/td> 791K
代理商: TC9331F
TC9331F
2002-02-05
18
(4)
The internal RAM (PRAM, CRAM, OFRAM) data transmission process
The STAD-R, which sets the starting address for the writing process, adds a +1 increment to the
address after writing each data unit. The internal RAM units that can utilize the buffer RAM (32
words × 16 bits) are the CRAM and OFRAM. For them to do so, the coefficient and offset addresses
must be rewritten in successively increasing increments of +1. For example, the coefficient address of
the secondary IIR in the equalizer must be successively arranged from 5 single-precision units to 10
multiple-precision units. The buffer RAM is used when altering the individual characteristics of the
filter. These coefficients can be rewritten within a single sampling period.
Ex. Rewriting the offset data coefficient in the buffer RAM
When the targeted rewrite coefficient addresses are set at 30, 31, 32, 33, and 34, the following
takes place.
When the targeted coefficient RAM addresses are arranged in succession, as shown in the
example below, the buffer RAM can be rewritten.
, 29, 30, 31, 32, 33, 34, 35, 36, (or)
, 29, 30, 36, 31, 32, 28, 29, 33, 34, 35, 36,
When the targeted coefficient RAM addresses are randomly arranged, as shown in the example
below, the buffer RAM cannot be rewritten.
, 29, 30, 31, 34, 33, 32, 35, 36,
● Setting up the data in the PRAM (Program RAM)
1. The write starting address is set in the STAD-R (command: 0CH).
2. An “0AH” command is transmitted and the PRAM write-to flag is triggered.
3. Only the 32 bit program code data is continued and the necessary steps are transmitted.
● Setting up the data in the CRAM (coefficient RAM) and OFRAM (offset RAM)
(a) The buffer RAM is not in use (The ACMP of the CNT-R1 is set to “0”).
1. The write starting address is set in the STAD-R (command: 0CH).
2. An “09H” or “08H” command is transmitted and the CRAM or OFRAM write-to flag is
triggered.
3. Only the 16 bit coefficient or offset data is continued and the necessary steps are
transmitted.
(b) The buffer RAM is in use (the ACMP of the CNT-R1 is set to “1”).
1. The write starting address is set in the STAD-R (command: 0CH).
2. The data coefficient-1 stored in the buffer RAM is set to the TXW-R.
3. An “09H” or “08H” command is transmitted and the CRAM or OFRAM write-to flag is
triggered.
4. Only the 16 bit coefficient or offset data is continued and the necessary steps are
transmitted.
相關(guān)PDF資料
PDF描述
TC9331F SPECIALTY CONSUMER CIRCUIT, PQFP80
TC9332F SPECIALTY CONSUMER CIRCUIT, PQFP60
TC9335F-001 SPECIALTY CONSUMER CIRCUIT, PDSO30
TC9400EJD VOLTAGE-FREQUENCY CONVERTER, 0.1 MHz, CDIP14
TC9400COD VOLTAGE-FREQUENCY CONVERTER, 0.1 MHz, PDSO14
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TC9332 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:AUDIO DIGITAL SIGNAL PROCESSOR
TC9332F 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:AUDIO DIGITAL SIGNAL PROCESSOR
TC9335F-001 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:2-CHANNEL DSP WITH 1-BIT DIGITAL TO ANALOG CONVERTER
TC9337F 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:AUDIO DIGITAL SIGNAL PROCESSOR
TC9349AFG 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:Single-Chip DTS Microcontroller (DTS-21)