參數(shù)資料
型號(hào)： T89C5115-TISUM
廠商： Atmel
文件頁數(shù)： 70/113頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 16K 28SOIC
標(biāo)準(zhǔn)包裝： 27
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 20
程序存儲(chǔ)器容量： 16KB（16K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量： 512 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
包裝： 管件
其它名稱： 89C5115-TISUM
6
AT89C5115
4128G–8051–02/08
P3.0:7
I/O
Port 3:
Is an 8-bit bi-directional I/O port with internal pull-ups. Port 3 pins that have 1’s written to them are pulled
high by the internal pull-up transistors and can be used as inputs in this state. As inputs, Port 3 pins that
are being pulled low externally will be a source of current (IIL, See section ’Electrical Characteristic’)
because of the internal pull-ups.
The output latch corresponding to a secondary function must be programmed to one for that function to
operate (except for TxD and WR). The secondary functions are assigned to the pins of port 3 as follows:
P3.0/RxD: Receiver data input (asynchronous) or data input/output (synchronous) of the serial interface
P3.1/TxD: Transmitter data output (asynchronous) or clock output (synchronous) of the serial interface
P3.2/INT0: External interrupt 0 input/timer 0 gate control input
P3.3/INT1: External interrupt 1 input/timer 1 gate control input
P3.4/T0: Timer 0 counter input
P3.5/T1: Timer 1 counter input
P3.6: Regular I/O port pin
P3.7: Regular I/O port pin
P4.0:1
I/O
Port 4:
Is an 2-bit bi-directional I/O port with internal pull-ups. Port 4 pins that have 1’s written to them are pulled
high by the internal pull-ups and can be used as inputs in this state. As inputs, Port 4 pins that are being
pulled low externally will be a source of current (IIL, on the datasheet) because of the internal pull-up
transistor.
P4.0:
P4.1:
It can drive CMOS inputs without external pull-ups.
RESET
I/O
Reset:
A high level on this pin during two machine cycles while the oscillator is running resets the device. An
internal pull-down resistor to VSS permits power-on reset using only an external capacitor to VCC.
XTAL1
I
XTAL1:
Input of the inverting oscillator amplifier and input of the internal clock generator circuits. To drive the
device from an external clock source, XTAL1 should be driven, while XTAL2 is left unconnected. To
operate above a frequency of 16 MHz, a duty cycle of 50% should be maintained.
XTAL2
O
XTAL2:
Output from the inverting oscillator amplifier.
Pin Name
Type
Description
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