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Data Sheet
January 1998
T7288 CEPT/E1 Line Interface
2
Lucent Technologies Inc.
Pin Information
Figure 2. Pin Diagram
Table 1. Pin Descriptions
Pin
1
Symbol
LOS
Type
O
Name/Function
This pin is cleared (0) upon loss of the data sig-
Loss of Signal (Active-Low).
nal at the receiver inputs.
Loss of Clock (Active-Low).
indicating that a loss of clock has occurred. When
on the RCLK and on either RDATA (for single-rail operation) or RPDATA and
RNDATA (for dual-rail operation) outputs. A valid clock must be present at
BCLK for this function to operate properly.
HDB3 Enable/N-Rail Transmit Data.
If
an HDB3 substitution code on the transmit side and to remove the substitution
code on the receive side. If
SR
/DR = 1, this pin is used as the n-rail transmit
input data (internal pull-down is included).
Violation/N-Rail Receive Data.
If
SR
/DR = 0 and HDB3 = 0, bipolar violations
on the receive-side input are detected, causing VIO to be set; if HDB3 = 1,
HDB3 code violations cause VIO to be set. If
n-rail receive output data.
Receive Clock.
Output receive clock signal to the terminal equipment.
Receive Data/P-Rail Receive Data.
If
SR
2.048 Mbits/s unipolar output data with a 100% duty cycle. If
pin is used as the p-rail receive output data.
Transmit Clock.
Input clock signal (2.048 MHz
Transmit Data/P-Rail Transmit Data.
If
2.048 Mbits/s unipolar input data. If
SR
/DR = 1, this pin is used as the p-rail
transmit input data.
2
LOC
O
This pin is cleared when SD = 1 and
LOS
= 0,
LOS
= 0, no transitions occur
3
HDB3/
TNDATA
I
SR
/DR = 0, this pin is set (1) to insert
4
VIO/RNDATA
O
SR
/DR = 1, this pin is used as the
5
6
RCLK
RDATA/
RPDATA
O
O
/DR = 0, this pin is used for
SR
/DR = 1, this
7
8
TCLK
TDATA/
TPDATA
I
I
±
80 ppm).
SR
/DR = 0, this pin is used as
T7288-PL
T7288-EL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
24
23
22
21
20
19
18
17
16
15
LOS
LOC
HDB3/TNDATA
VIO/RNDATA
RCLK
RDATA/RPDATA
TCLK
TDATA/TPDATA
LP1
LP2
LP3
ALMT
RBC
TBC
T1
R1
SD
V
DDA
ZS
T2
V
DDD
R2
GND
D
NC
FLM
SR/DR
BCLK
25
26
27
28
GND
A
5-4344(C)