
TE
CH
tm
Burst Length Field (A2~A0)
This field specifies the data length of column access using the A2~A0 pins and selects the Burst Length to be 2,
4, 8, or full page.
T4312816B
TM Technology Inc. reserves the right
P. 11
to change products or specifications without notice.
Publication Date: FEB. 2007
Revision: A
A2
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
Burst Length
1
2
4
8
Reserved
Reserved
Reserved
Full Page
Full Page Length : 512
The Burst Type can be one of two modes, Interleave Mode or Sequential Mode.
Burst Type Field (A3)
A3
0
1
Burst Type
Sequential
Interleave
--- Addressing Sequence of Sequential Mode
An internal column address is performed by increasing the address from the column address which is input to
the device. The internal column address is varied by the Burst Length as shown in the following table. When
the value of column address, (n + m), in the table is larger than 255, only the least significant 8 bits are
effective.
Data n
0
1
2
3
4
5
6
7
-
255
256
257
-
Column Address
n
n+1
n+2
n+3
n+4
n+5
n+6
n+7
-
n+255
n
n+1
-
2 words:
Burst Length
--- Addressing Sequence of Interleave Mode
A column access is started in the input column address and is performed by inverting the address bits in the
sequence shown in the following table.
4 words:
8 words:
Full Page: Column address is repeated until terminated.
Data n
Data 0 A7 A6 A5 A4 A3 A2 A1 A0
Data 1 A7 A6 A5 A4 A3 A2 A1 A0#
Data 2 A7 A6 A5 A4 A3 A2 A1# A0
Data 3 A7 A6 A5 A4 A3 A2 A1# A0#
Data 4 A7 A6 A5 A4 A3 A2# A1 A0
Data 5 A7 A6 A5 A4 A3 A2# A1 A0#
Data 6 A7 A6 A5 A4 A3 A2# A1# A0
Data 7 A7 A6 A5 A4 A3 A2# A1# A0#
CAS# Latency Field (A6~A4)
Column Address
Burst Length
4 words
8 words