參數(shù)資料
型號： ST7FDALIF2M6
廠商： 意法半導(dǎo)體
元件分類： ADC
英文描述： 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI, DALI
中文描述： 8位單電壓閃存存儲器，數(shù)據(jù)EEPROM，模數(shù)轉(zhuǎn)換器，定時(shí)器，SPI和大理微控制器
文件頁數(shù)： 76/141頁
文件大?。?/td> 2175K
代理商： ST7FDALIF2M6
ST7DALI
76/141
1
DALI COMMUNICATION MODULE
(Cont’d)
11.4.11 Register Description
DCM DATA RATE CONTROL REGISTER
(DCMCLK)
Read / Write
Reset Value: 0000 0000 (00h)
Bits 7:0 =
DCMCLK[7:0]
Clock Prescaler.
These bits are set/cleared by software and cleared
by hardware after a reset.
These 8 bits are used for tuning the DALI data
rate. f
DATA
= f
CPU
/[(N+1)*16] where N is the inte-
ger value of the DCMCLK register.
DCM FORWARD ADDRESS REGISTER
(DCMFA)
Read only
Reset Value: 0000 0000 (00h)
Bits 7:0 =
DCMFA[7:0]
Forward Address.
These bits are read by software and set/cleared by
hardware.
These 8 bits are used to store the "forward frame"
address byte.
DCM FORWARD DATA REGISTER (DCMFD)
Read only
Reset Value: 0000 0000 (00h)
Bits 7:0 =
DCMFD[7:0]
Forward Data.
These bits are read by software and set/cleared by
hardware.
These 8 bits are used to store the "forward frame"
data byte.
DCM BACKWARD DATA REGISTER (DCMBD)
Read / Write
Reset Value: 0000 0000 (00h)
Bits 7:0 =
DCMBD[7:0]
Backward Data.
These bits are set/cleared by software and cleared
by hardware after a reset.
These 8 bits are used to store the "backward
frame" data byte. The sofware writes to this regis-
ter before enabling the transmit operation.
7
0
CK7
CK6
CK5
CK4
CK3
CK2
CK1
CK0
7
0
FA7
FA6
FA5
FA4
FA3
FA2
FA1
FA0
7
0
FD7
FD6
FD5
FD4
FD3
FD2
FD1
FD0
7
0
BD7
BD6
BD5
BD4
BD3
BD2
BD1
BD0
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