參數(shù)資料
型號(hào)： ST7FDALIF2M6
廠商： 意法半導(dǎo)體
元件分類： ADC
英文描述： 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI, DALI
中文描述： 8位單電壓閃存存儲(chǔ)器，數(shù)據(jù)EEPROM，模數(shù)轉(zhuǎn)換器，定時(shí)器，SPI和大理微控制器
文件頁數(shù)： 119/141頁
文件大?。?/td> 2175K
代理商： ST7FDALIF2M6
ST7DALI
119/141
13.9 CONTROL PIN CHARACTERISTICS
13.9.1 Asynchronous RESET Pin
T
A
= -40°C to 85°C, unless otherwise specified
Notes:
1. Data based on characterization results, not tested in production.
2. The I
current sunk must always respect the absolute maximum rating specified in
Section 13.2.2
and the sum of I
IO
(I/O ports and control pins) must not exceed I
VSS
.
3. The R
pull-up equivalent resistor is based on a resistive transistor. Specified for voltages on RESET pin between
V
ILmax
and V
DD
4. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on
RESET pin with a duration below t
h(RSTL)in
can be ignored.
Symbol
V
IL
V
IH
V
hys
Parameter
Conditions
Min
Typ
Max
0.3xV
DD
V
DD
+ 0.3
Unit
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
1)
V
SS
- 0.3
0.7xV
DD
V
2
V
V
OL
Output low level voltage
2)
V
DD
=5V
I
IO
=+5mA T
A
≤
85°C
T
A
≥
85°C
0.5
1.0
1.2
0.4
0.5
80
120
V
I
IO
=+2mA T
A
≤
85°C
T
A
≥
85°C
0.2
R
ON
Pull-up equivalent resistor
3) 1)
V
DD
=5V
V
DD
=3V.
Internal reset sources
20
40
40
70
30
k
t
w(RSTL)out
Generated reset pulse duration
t
h(RSTL)in
t
g(RSTL)in
Filtered glitch duration
μ
s
μ
s
ns
External reset pulse hold time
4)
20
200
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