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| 型號(hào)： | ST72T85A5Q6 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-BIT MCU FOR RDS WITH 48K ROM, 3K RAM, ADC, TWO TIMERS, TWO SPIs, I2C AND SCI INTERFACES |
| 中文描述： | 8位微控制器48,000鐵路發(fā)展策略光盤，3K內(nèi)存，ADC，兩個(gè)定時(shí)器，2個(gè)SPI，I2C和脊髓損傷接口 |
| 文件頁(yè)數(shù)： | 27/117頁(yè) |
| 文件大?。?/td> | 748K |
| 代理商： | ST72T85A5Q6 |
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ST7285C
I/O PORTS
(Cont’d)
4.1.3 I/O Port Implementation
On the ST7285C, the pull down is always absent,
the pull up exists only where an interrupt facility is
present (Ports C4, C5, D4, D5, F0, F1, F2, F3,
G3). On port A, the analog inputs are directly con-
trolled by the ADC.The I/O port register configura-
tions are reduced to the following.
4.1.3.1 Ports A0-A7, B0-B7, C0-C3, C6, C7, D0-
D3, D6, D7,E0-E7, F4-F7, G0-G2, G4-G7, H0-H5
These ports do not offer interrupt capabilities.
Note: Open drain I/O is implemented on I2C pins
(pins 19 and 20) and high voltage pins (PH3/4/5).
The design uses special I/O devices without P
channel, thus forbidding the push pull configura-
tion.
In this case there is neither pull up register nor op-
tion register. These registers do not exist and so
cannot be read or written to.
4.1.3.2 Ports C4, C5, D4, D5, F0-F3, G3
These ports offer interrupt capabilities.
In this case there is no pull up register since the
pull-up is present only when the interrupt feature is
selected. This register does not exist and so can-
not be read or written to.
Switching these I/O ports from one state to anoth-
er should be done in such a sequence as to pre-
vent unwanted side effects. Recommended safe
transitions are illustrated inFigure 14. Other tran-
sitions are potentially risky and should be avoided,
since they are likely to present unwanted side-ef-
fects such as spurious interrupt generation.
Figure 14. Recommended I/O State Transition Diagram
DDR
0
1
MODE
input
output
OPTION
no pull-up, no pull-down, no interrupt
push-pull (or open drain: see note)
DDR
OR
MOD
E
OPTION
0
0
input
no pull-up, no pull-down,
no interrupt
interrupt, pull-up
open-drain, no pull-up
push-pull, no pull-up,
no pull-down
0
1
1
0
input
output
1
1
output
11
00
01
Interrupt
pull-up
push-pull
no pull-up
no pull-down
open-drain
no pull-up
INPUT
OUTPUT
OUTPUT
10
no pull-up
no interrupt
no pull-down
(Reset state)
INPUT
XX
= DDR, OR
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