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參數(shù)資料
| 型號： | ST16C2550 |
| 廠商： | Exar Corporation |
| 英文描述： | Dual UART with 16-Byte of Transmit and Receive FIFO(雙通用異步接收器/發(fā)送器（帶16字節(jié)接收和發(fā)送先進(jìn)先出）) |
| 中文描述： | 雙UART具有16的發(fā)送和接收FIFO（雙通用異步接收器/發(fā)送器（帶16字節(jié)接收和發(fā)送先進(jìn)先出字節(jié)）） |
| 文件頁數(shù)： | 19/34頁 |
| 文件大?。?/td> | 314K |
| 代理商： | ST16C2550 |
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ST16C2550
19
Rev. 3.40
number of logic 1’s in the transmitted data. The receiver
must be programmed to check the same format. (nor-
mal default condition)
Logic 1 = EVEN Parity
is generated by forcing an even
the number of logic 1’s in the transmitted. The receiver
must be programmed to check the same format.
LCR BIT-5:
If the parity bit is enabled, LCR BIT-5 selects the
forced parity format.
LCR BIT-5 = logic 0, parity is not forced. (normal default
condition)
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit
is forced to a logical 1 for the transmit and receive
data.
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit
is forced to a logical 0 for the transmit and receive
data.
LCR
Bit-5
LCR
Bit-4
LCR
Bit-3
Parity selection
X
0
0
1
1
X
0
1
0
1
0
1
1
1
1
No parity
Odd parity
Even parity
Force parity “1”
Forced parity “0”
LCR BIT-6:
When enabled the Break control bit causes a break
condition to be transmitted (the TX output is forced to
a logic 0 state). This condition exists until disabled by
setting LCR bit-6 to a logic 0.
Logic 0 = No TX break condition. (normal default
condition)
Logic 1 = Forces the transmitter output (TX) to a logic
0 for alerting the remote receiver to a line break
condition.
LCR BIT-7:
The internal baud rate counter latch and Enhance
Feature mode enable.
Logic 0 = Divisor latch disabled. (normal default condi-
tion)
Logic 1 = Divisor latch enabled.
Modem Control Register (MCR)
This register controls the interface with the modem or a
peripheral device.
MCR BIT-0:
Logic 0 = Force -DTR output to a logic 1. (normal
default condition)
Logic 1 = Force -DTR output to a logic 0.
MCR BIT-1:
Logic 0 = Force -RTS output to a logic 1. (normal
default condition)
Logic 1 = Force -RTS output to a logic 0.
MCR BIT-2:
-OP1 A/B are not available in the 2550 packages.
This
bit is instead used in the Loop-back mode only. In the
loop-back mode this bit is use to write the state of the
modem -RI interface signal.
MCR BIT-3:
Logic 0 = Forces INT (A-B) outputs to the three state
mode and sets -OP2 to a logic 1. (normal default
condition)
Logic 1 = Forces the INT (A-B) outputs to the active
mode and sets -OP2 to a logic 0.
MCR BIT-4:
Enable the local loop-back mode (diagnostics). In this
mode the transmitter output (-TX) and the receiver
input (-RX), -CTS, -DSR, -CD, and -RI are discon-
nected from the 2550 I/O pins. Internally the modem
data and control pins are connected into a loop-back
data configuration. In this mode, the receiver and
transmitter interrupts remain fully operational. The
Modem Control Interrupts are also operational, but the
interrupts sources are switched to the lower four bits of
the Modem Control. Interrupts continue to be con-
trolled by the IER register.
Logic 0 = Disable loop-back mode. (normal default
condition)
Logic 1 = Enable local loop-back mode (diagnostics).
MCR BIT 5-7:
Not Used - initialized to a logic 0.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C2550_04 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.97V TO 5.5V DUART WITH 16-BYTE FIFO |
| ST16C2550CJ-0A-EB | 功能描述:界面開發(fā)工具 Supports C2550 44 ld PLCC, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| ST16C2550CJ44 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.97V TO 5.5V DUART WITH 16-BYTE FIFO |
| ST16C2550CJ44-F | 功能描述:UART 接口集成電路 2.97V-5.5V 16B FIFO temp 0C to 70C; UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C2550CJ44TR-F | 功能描述:UART 接口集成電路 DUAL UART W/16BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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