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參數(shù)資料
| 型號： | ST16654 |
| 廠商： | Exar Corporation |
| 英文描述： | QUAD UART WITH 64-BYTE FIFO AND INFRARED (IrDA) ENCODER/DECODER |
| 中文描述： | 四UART的64字節(jié)FIFO和紅外線（IrDA）編碼/解碼器 |
| 文件頁數(shù)： | 11/49頁 |
| 文件大?。?/td> | 444K |
| 代理商： | ST16654 |
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ST16C654/654D
5-75
Rev. 4.10
Symbol
Pin
100
Signal
type
Pin Description
68
64
Enhanced Feature Register (EFR) bit-7, for hardware flow
control operation.
-DSR A-B
-DSR C-D
10,26
44,60
7,23
58,74
1,17
32,48
I
Data Set Ready (active low) - These inputs are associated
with individual UART channels, A through D. A logic 0 on
this pin indicates the modem or data set is powered-on and
is ready for data exchange with the UART. This pin has no
effect on the UART’s transmit or receive operation.
-DTR A-B
-DTR C-D
12,24
46,58
9,21
60,72
3,15
34,46
O
Data Terminal Ready (active low) - These inputs are
associated with individual UART channels, A through D. A
logic 0 on this pin indicates that the 654 is powered-on and
ready. This pin can be controlled via the modem control
register. Writing a logic 1 to MCR bit-0 will set the -DTR
output to logic 0, enabling the modem. This pin will be a logic
1 after writing a logic 0 to MCR bit-0, or after a reset. This
pin has no effect on the UART’s transmit or receive opera-
tion.
-RI A-B
-RI C-D
8,28
42,62
98,33
48,84
63,19
30,50
I
Ring Indicator (active low) - These inputs are associated
with individual UART channels, A through D. A logic 0 on
this pin indicates the modem has received a ringing signal
from the telephone line. A logic 1 transition on this input pin
will generate an interrupt.
-RTS A-B
-RTS C-D
14,22
48,56
11,19
62,70
5,13
36,44
O
Request to Send (active low) - These outputs are associated
with individual UART channels, A through D. A logic 0 on the
-RTS pin indicates the transmitter has data ready and
waiting to send. Writing a logic 1 in the modem control
register (MCR bit-1) will set this pin to a logic 0 indicating
data is available. After a reset this pin will be set to a logic
1. This pin only affects the transmit and receive operations
when Auto RTS function is enabled via the Enhanced
Feature Register (EFR) bit-6, for hardware flow control
operation.
SYMBOL DESCRIPTION
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