ST10F296E
The bootstrap loader
6.2
Standard bootstrap loader (BSL)
The built-in bootstrap loader of the ST10F296E provides a mechanism to load the startup
program, which is executed after reset, via the serial interface. In this case no external
(ROM) memory or internal ROM is required for the initialization code starting at location
00’0000H. The bootstrap loader moves code/data into the IRAM, but it is also possible to
transfer data via the serial interface into an external RAM using a second level loader
routine. ROM memory (internal or external) is not necessary. However, it may be used to
provide lookup tables or may provide ‘core-code’, a set of general purpose subroutines, for
I/O operations, number crunching, system initialization, etc.
The bootstrap loader may be used to load the complete application software into ROMless
systems. It may also load temporary software into complete systems for testing or
calibration. in addition, it may be used to load a programming routine for Flash devices.
The BSL mechanism may be used for standard system startup as well as for special
occasions such as system maintenance (firmware update), end-of-line programming, or
testing.
6.2.1
Entering the standard bootstrap loader
The ST10F296E enters BSL mode if pin P0L.4 is sampled low at the end of a hardware
reset. In this case the built-in bootstrap loader is activated independently of the selected bus
mode. The bootstrap loader code is stored in a special Test-Flash: No part of the standard
Flash memory area is required for this.
After entering BSL mode and completing the respective initialization steps, the ST10F296E
scans the RxD0 line and the CAN1_RxD line to receive either a valid dominant bit from the
CAN interface, or a start condition from the UART line.
Start condition on UART RxD: The ST10F296E starts the standard bootstrap loader. This
bootstrap loader is identical to other ST10 devices (for example, the ST10F280). See
Valid dominant bit on CAN1 RxD: The ST10F296E starts bootstrapping via CAN1. This
shows the program flow of the new bootstrap loader. It illustrates how new functionalities are
implemented, which is as follows:
●
UART: UART has priority over CAN after a falling edge on CAN1_RxD untill the first
valid rising edge on CAN1_RxD.
●
CAN: Pulses on CAN1_RxD which are shorter than 20*CPU-cycles, are filtered.
Table 35.
ST10F296E boot mode selection
P0.5
P0.4
ST10 decoding
1
User mode: User Flash is mapped at 00’0000h
10
Standard bootstrap loader: User Flash is mapped from 00’0000h, code
fetches redirected data to Test-Flash at 00’0000h
0
1
Alternate boot mode: Flash mapping depends on signature integrity check
00
Reserved