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參數(shù)資料
| 型號(hào)： | ST10F296TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 64 MHz, MICROCONTROLLER, PBGA208 |
| 封裝： | 23 X 23 MM, 1.96 MM HEIGHT, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, BGA-208 |
| 文件頁(yè)數(shù)： | 14/346頁(yè) |
| 文件大?。?/td> | 5607K |
| 代理商： | ST10F296TR |
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General purpose timer unit
ST10F296E
110/346
11
General purpose timer unit
The GPT unit is a flexible multifunctional timer/counter structure which is used for time
related tasks such as event timing and counting, pulse width and duty cycle measurements,
pulse generation, or pulse multiplication. The GPT unit contains five 16-bit timers organized
into two separate modules GPT1 and GPT2. Each timer in each module may operate
independently in several different modes, or may be concatenated with another timer of the
same module.
11.1
GPT1
Each of the three timers T2, T3, T4 of the GPT1 module can be configured individually for
one of four basic modes of operation: Timer, gated timer, counter mode and incremental
interface mode.
In timer mode, the input clock for a timer is derived from the CPU clock, divided by a
programmable prescaler.
In counter mode, the timer is clocked with reference to external events.
Pulse width or duty cycle measurement is supported in gated timer mode where the
operation of a timer is controlled by the ‘gate’ level on an external input pin. For these
purposes, each timer has one associated port pin (TxIN) which serves as gate or clock
input.
scaler option at 40 MHz and 64 MHz CPU clock respectively. This also applies to the gated
timer mode of T3 and to the auxiliary timers T2 and T4 in timer and gated timer mode. The
count direction (up/down) for each timer is programmable by software or may be altered
dynamically by an external signal on a port pin (TxEUD).
In incremental interface mode, the GPT1 timers (T2, T3, T4) can be directly connected to
the incremental position sensor signals A and B by their respective inputs TxIN and TxEUD.
Direction and count signals are internally derived from these two input signals so that the
contents of the respective timer Tx corresponds to the sensor position. The third position
sensor signal TOP0 can be connected to an interrupt input.
Timer T3 has output toggle latches (TxOTL) which change state on each timer over
flow/underflow. The state of this latch may be output on port pins (TxOUT) for time out
monitoring of external hardware components, or may be used internally to clock timers T2
and T4 for high resolution of long duration measurements.
In addition to their basic operating modes, timers T2 and T4 may be configured as reload or
capture registers for timer T3. When used as capture or reload registers, timers T2 and T4
are stopped. The contents of timer T3 are captured into T2 or T4 in response to a signal at
their associated input pins (TxIN).
Timer T3 is reloaded with the contents of T2 or T4 triggered either by an external signal or
by a selectable state transition of its toggle latch T3OTL. When both T2 and T4 are
configured to alternately reload T3 on opposite state transitions of T3OTL with the low and
high times of a PWM signal, this signal can be constantly generated without software
intervention.
Figure 24 shows the block diagram of the GPT1.
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| ST10-IP-EE | 功能描述:電機(jī)驅(qū)動(dòng)器 RoHS:否 制造商:Applied Motion 電機(jī)驅(qū)動(dòng)類型:2035 Step 電源電壓:12 V to 35 V 功率額定值:70 W 每轉(zhuǎn)步距分辨率:200 to 400 框架大小 (NEMA): |
| ST10-IP-EE (5000-182) | 功能描述:電機(jī)驅(qū)動(dòng)器 RoHS:否 制造商:Applied Motion 電機(jī)驅(qū)動(dòng)類型:2035 Step 電源電壓:12 V to 35 V 功率額定值:70 W 每轉(zhuǎn)步距分辨率:200 to 400 框架大小 (NEMA): |
| ST10-IP-EN | 功能描述:電機(jī)驅(qū)動(dòng)器 RoHS:否 制造商:Applied Motion 電機(jī)驅(qū)動(dòng)類型:2035 Step 電源電壓:12 V to 35 V 功率額定值:70 W 每轉(zhuǎn)步距分辨率:200 to 400 框架大小 (NEMA): |
| ST10-IP-EN (5000-181) | 功能描述:電機(jī)驅(qū)動(dòng)器 RoHS:否 制造商:Applied Motion 電機(jī)驅(qū)動(dòng)類型:2035 Step 電源電壓:12 V to 35 V 功率額定值:70 W 每轉(zhuǎn)步距分辨率:200 to 400 框架大小 (NEMA): |
| ST10-PE | 制造商:Phoenix Contact 功能描述:TERMINAL ST 10-PE |
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