參數(shù)資料
型號： SSTUB32864EC/G
廠商： NXP SEMICONDUCTORS
元件分類： 鎖存器
英文描述： 32864 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96
封裝： 13.50 X 5.50 MM, 1.05 MM HEIGHT, LEAD FREE, PLASTIC, SOT-536-1, LFBGA-96
文件頁數(shù)： 18/19頁
文件大?。?/td> 113K
代理商： SSTUB32864EC/G
SSTUB32864_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 26 March 2007
8 of 19
NXP Semiconductors
SSTUB32864
1.8 V congurable registered buffer for DDR2-800 RDIMM applications
8.
Limiting values
[1]
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
This value is limited to 2.5 V maximum.
9.
Recommended operating conditions
[1]
The RESET and Cn inputs of the device must be held at valid logic levels (not oating) to ensure proper device operation.
[2]
The differential inputs must not be oating, unless RESET is LOW.
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDD
supply voltage
0.5
+2.5
V
VI
input voltage
receiver
0.5[1]
+2.5[2]
V
VO
output voltage
driver
0.5[1]
VDD + 0.5[2]
V
IIK
input clamping current
VI < 0 V or VI >VDD
-
±50
mA
IOK
output clamping current
VO < 0 V or VO >VDD
-
±50
mA
IO
output current
continuous;
0V<VO <VDD
-
±50
mA
ICCC
continuous current through each
VDD or GND pin
-
±100
mA
Tstg
storage temperature
65
+150
°C
Table 5.
Operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDD
supply voltage
1.7
-
2.0
V
Vref
reference voltage
0.49
× VDD
0.50
× VDD 0.51 × VDD
V
VT
termination voltage
Vref 0.040
Vref
Vref + 0.040
V
VI
input voltage
0
-
VDD
V
VIH(AC)
AC HIGH-level input voltage
data inputs (Dn), CSR
Vref + 0.250
-
V
VIL(AC)
AC LOW-level input voltage
data inputs (Dn), CSR
-
Vref 0.250
V
VIH(DC)
DC HIGH-level input voltage data inputs (Dn), CSR
Vref + 0.125
-
V
VIL(DC)
DC LOW-level input voltage
data inputs (Dn), CSR
-
Vref 0.125
V
VIH
HIGH-level input voltage
RESET, Cn
[1] 0.65
× VDD
-VDD
V
VIL
LOW-level input voltage
RESET, Cn
-
0.35
× VDD
V
VICR
common mode input voltage
range
CK, CK
[2] 0.675
-
1.125
V
VID
differential input voltage
CK, CK
[2] 600
-
mV
IOH
HIGH-level output current
-
8mA
IOL
LOW-level output current
-
8
mA
Tamb
ambient temperature
operating in free air
0
-
+70
°C
相關(guān)PDF資料
PDF描述
SSTUB32868ET/S 32868 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA176
SSTUG32865ET/S SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA160
SSTUG32868ET/G 32868 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA176
SSTUP32866EC/S 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96
SSTV16857EC POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA56
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SSTUB32865 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-800 RDIMM applications
SSTUB32865ET/G,518 功能描述:寄存器 1.8V 28B REG RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
SSTUB32865ET/G-T 功能描述:寄存器 1.8V 28B REG BUF/PRTY DDR2-800 RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
SSTUB32866 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications
SSTUB32866_10 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*