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參數(shù)資料
| 型號： | SM320C50HFGM66 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-BIT, 66 MHz, OTHER DSP, CQFP132 |
| 封裝： | TIE BAR, CERAMIC, QFP-132 |
| 文件頁數(shù)： | 17/35頁 |
| 文件大?。?/td> | 536K |
| 代理商： | SM320C50HFGM66 |
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SMJ320C50/SMQ320C50
DIGITAL SIGNAL PROCESSOR
SGUS020 – JUNE 1996
24
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
SERIAL-PORT TRANSMIT, EXTERNAL CLOCKS AND EXTERNAL FRAMES
switching characteristics over recommended operating conditions (see Note 3)
PARAMETER
MIN
MAX
UNIT
td(CXH-DXV)
Delay time, DX valid after CLKX high
25
ns
tdis(CXH-DX)
Disable time, DX valid after CLKX high
40
ns
th(CXH-DXV)
Hold time, DX valid after CLKX high
–5
ns
timing requirements over recommended ranges of supply voltage and operating free-air
temperature [H = 0.5tc(CO)] (see Note 3)
MIN
MAX
UNIT
tc(SCK)
Cycle time, serial-port clock
5.2H
ns
tf(SCK)
Fall time, serial-port clock
8
ns
tr(SCK)
Rise time, serial-port clock
8
ns
tw(SCK)
Pulse duration, serial-port clock low/high
2.1H
ns
td(CXH-FXH)
Delay time, FSX after CLKX high edge
2H – 8
ns
th(CXL-FXL)
Hold time, FSX after CLKX falling edge
10
ns
th(CXH-FXL)
Hold time, FSX after CLKX high edge
2H – 8§
ns
Values derived from characterization data and are not tested.
The serial-port design is fully static and therefore can operate with tc(SCK) approaching ∞. It is characterized approaching an input frequency of
0 Hz but tested at a much higher frequency to minimize test time.
§ If the FSX pulse does not meet this specification, the first bit of serial data will be driven on the DX pin until the falling edge of FSX. After the falling
edge of FSX, data will be shifted out on the DX pin. The transmit-buffer-empty interrupt will be generated when the th(FS) and th(FS)H specification
is met.
NOTE 3: Internal clock with external FSX and vice versa are also allowable. However, FSX timings to CLKX are always defined depending on
the source of FSX, and CLKX timings are always dependent upon the source of CLKX. Specifically, the relationship of FSX to CLKX
is independent of the source of CLKX.
DX Bit
FSX
CLKX
8 or 16
(see Note A)
7 or 15
(see Note A)
2
1
th(CXH-DXV)
td(CXH-DXV)
tw(SCK)
tr(SCK)
tf(SCK)
tw(SCK)
tc(SCK)
td(CXH-FXH))
th(CXL-FXL)
tdis(CXH-DX)
th(CXH-FXL)
NOTE A: Depending on whether information is sent in an 8-bit or 16-bit packet.
Figure 15. Serial-Port Transmit Timing of External Clocks and External Frames
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