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參數(shù)資料
| 型號： | Si571 |
| 廠商： | Silicon Laboratories Inc. |
| 英文描述： | ANY-RATE I2C PROGRAMMABLE XO/VCXO |
| 中文描述： | 任意頻率I2C可編程振蕩器/壓控 |
| 文件頁數(shù)： | 5/26頁 |
| 文件大小： | 295K |
| 代理商： | SI571 |
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Si570/Si571
Rev. 0.3
5
2. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Supply Voltage
1
V
DD
3.3 V option
2.97
3.3
3.63
V
2.5 V option
2.25
2.5
2.75
1.8 V option
1.71
1.8
1.89
Supply Current
I
DD
Output enabled
LVPECL
CML
LVDS
CMOS
—
—
—
—
120
108
99
90
130
117
108
98
mA
TriState mode
—
60
75
Output Enable (OE)
2
V
IH
V
IL
0.75 x V
DD
—
—
—
V
—
0.5
Operating Temperature Range
T
A
–40
—
85
oC
Notes:
1.
Selectable parameter specified by part number. See Section "7. Ordering Information" on page 21 for further details.
2.
OE pin includes a 17 k
Ω
pullup resistor to V
DD
or a 17 k
Ω
pulldown to GND depending on the OE polarity specified in
the part number. See "7. Ordering Information" on page 21.
Table 2. V
C
Control Voltage Input
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Control Voltage Tuning Slope
1,2,3
K
V
V
C
10 to 90% of V
DD
—
33
45
90
135
180
356
—
ppm/V
Control Voltage Linearity
4
L
VC
BSL
–5
±1
+5
%
Incremental
–10
±5
+10
Modulation Bandwidth
BW
9.3
10.0
10.7
kHz
V
C
Input Impedance
Nominal Control Voltage
Z
VC
V
CNOM
V
C
500
—
—
k
Ω
@ f
O
—
V
DD
/2
—
V
Control Voltage Tuning Range
0
V
DD
V
Notes:
1.
Positive slope; selectable option by part number. See "7. Ordering Information" on page 21.
2.
For best jitter and phase noise performance, always choose the smallest K
V
that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (K
V
), Stability, and Absolute Pull Range (APR)” for more information.
3.
K
V
variation is ±10% of typical values.
4.
BSL determined from deviation from best straight line fit with V
C
ranging from 10 to 90% of V
DD
. Incremental slope
determined with V
C
ranging from 10 to 90% of V
DD
.
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