參數(shù)資料
型號: SDA9188-3X
廠商: SIEMENS A G
元件分類: 畫面疊加
英文描述: Picture-in-Picture Processor with On-Chip PLL
中文描述: PICTURE-IN-PICTURE IC, PDSO28
文件頁數(shù): 16/31頁
文件大小: 462K
代理商: SDA9188-3X
Semiconductor Group
16
Register 5
(Address 05
H
)
Bit
Function
Name
Remarks
d1, d0
d3, d2
d4
d5
d6
d7
00 = Automatic TV standard recognition
01 = 50 Hz
10 = 60 Hz
11 = Freeze the current mode
same like d1, d0
0 = Frame width horizontal: 6 Pixel
1 = Frame width horizontal: 4 Pixel
0 = Frame width vertical: 3 lines
1 = Frame width vertical: 2 lines
0 = Horizontal decimation 3:1
1 = Horizontal decimation 4:1
0 = Vertical decimation 3:1
1 = Vertical decimation 4:1
IMOD0, 1
PMOD0, 1
FRWH
FRWV
DECHOR
DECVER
For multistandard applicat.
Fixed setting
Fixed setting
Undisturbed switching
during the change of the
received station
as above but for the parent
channel
Separated setting of the frame
width and height is possible
i.e. for 16:9 operation
Separated setting of the frame
width and height is possible
i.e. for 16:9 operation
Separated setting of the
picture width and height is
possible i.e. for 16:9
operation, but only if Size = 0
in Register 0
Separated setting of the
picture width and height is
possible i.e. for 16:9
operation, but only if Size = 0
in Register 0
SDA 9188-3X
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