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參數(shù)資料
| 型號： | SDA9188-3X |
| 廠商： | SIEMENS A G |
| 元件分類： | 畫面疊加 |
| 英文描述： | Picture-in-Picture Processor with On-Chip PLL |
| 中文描述： | PICTURE-IN-PICTURE IC, PDSO28 |
| 文件頁數(shù)： | 11/31頁 |
| 文件大?。?/td> | 462K |
| 代理商： | SDA9188-3X |
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Semiconductor Group
11
SDA 9188-3X
I
2
C BUS
Organization of
I
2
C Bus Registers
SDA 9188-3X has the device address
00101110 = 2E
H
Applying the supply voltage
V
DD
produces a power-up reset. The bus lines SDA and SCL are
enabled. All bits in the registers except bit PL27 (D3 in Register 0) are set to 0. Bit PL27 is set to 1.
The
I
2
C bus interface works as a slave receiver and only functions if the inset clock LL3I is available.
Write Operation
Chip address byte
Register address
Data word1
After writing a byte into any register, the register address is automatically incremented for the write
access to the next register.
The following table shows the functions that can be set on the
I
2
C bus and define the data bytes. Not
used data bits have to be written with “0“ . Before PON = 1 all other bits have to be defined in
relation to the used hardware.
Table 6:
I
2
C Bus Register
The bits are numbered in the reverse order to the data stream of the
I
2
C bus.
If the control software addresses the internal register number 8 or 9 there is no longer any software
compatibility to the devices SDA 9088-2 and SDA 9089X. This is caused by the fact that in these
devices register 0 and 1 can also be accessed via the subaddress 08 and 09.
Function
SUB-
address
D7
D6
D5
D4
D3
D2
D1
D0
CONTROL 0
00
0
0
STILL
SIZE
PL27
NINT
OUT
PON
CONTROL 1
01
0
0
0
FRY
COL2
COL1
COL0
FRON
CONTROL 2
02
0
SD2
SD1
SD0
RDV 3
RDV 2
RDV 1
RDV 0
CONTROL 3
03
POS 1
POS 0
RDH 5
RDH 4
RDH 3
RDH 2
RDH 1
RDH 0
CONTROL 4
04
CON0
CON1
CON2
CON3
0
SOP
PLLOFF
HSP5
CONTROL 5
05
DECVER
DECHOR
FRWV
FRWH
PMOD1
PMOD0
IMOD1
IMOD0
CONTROL 6
06
FRAME
STATI
VSIIS
VSIDEL4
VSIDEL3
VSIDEL2
VSIDEL1
VSIDEL0
CONTROL 7
07
AMSEC
STATP
VSPIS
VSPDEL4
VSPDEL3
VSPDEL2
VSPDEL1
VSPDEL0
CONTROL 8
08
0
0
0
FRYEN
FRY5
FRY4
FRY3
FRY2
CONTROL 9
09
0
PLLTC
SOS
VCOSEL3 VCOSEL2 VCOSEL1 VCOSEL0
0
S
0010
1110
A
↑
0000
XXXX
A
XXXX
XXXX
A
P
Start
Stop
Ack
write
Write
↑
↑
→
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