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Chapter 13 FlexRay Communication Controller (FLEXRAY)
MC9S12XF - Family Reference Manual, Rev.1.19
Freescale Semiconductor
481
Write: Normal Mode
This register provides the means to control some of the interrupt request lines and provides the
corresponding interrupt ags. The interrupt ags MIF, PRIF, CHIF, RBIF, and TBIF are the outcome of a
binary OR of the related individual interrupt ags and interrupt enables. The generation scheme for these
Support. These ags are cleared automatically when all of the corresponding interrupt ags or interrupt
enables in the related interrupt ag and enable registers are cleared by the application.
Table 13-18. GIFER Field Descriptions (Sheet 1 of 2)
Field
Description
15
MIF
Module Interrupt Flag — This ag is set if at least one of the other interrupt ags is in this register is asserted
and the related interrupt enable is asserted, too. The FlexRay block generates the module interrupt request if
MIE is asserted.
0 No interrupt ag is asserted or no interrupt enable is set
1 At least one of the other interrupt ags in this register is asserted and the related interrupt bit is asserted, too
13
PRIF
Protocol Interrupt Flag — This ag is set if at least one of the individual protocol interrupt ags in the
Protocol interrupt enable ag is asserted, too. The FlexRay block generates the combined protocol interrupt request if the
PRIE ag is asserted.
0 All individual protocol interrupt ags are equal to 0 or no interrupt enable bit is set.
1 At least one of the individual protocol interrupt ags and the related interrupt enable is equal to 1.
13
CHIF
(CHIERFR) is asserted and the chi error interrupt enable GIFER.CHIE is asserted. The FlexRay block generates
the combined CHI error interrupt if the CHIE ag is asserted, too.
0 All CHI error ags are equal to 0 or the chi error interrupt is disabled
1 At least one CHI error ag is asserted and chi error interrupt is enabled
12
WUPIF
Wakeup Interrupt Flag — This ag is set when the FlexRay block has received a wakeup symbol on the
FlexRay bus. The application can determine on which channel the wakeup symbol was received by reading the
the wakeup interrupt request if the WUPIE ag is asserted.
0 No wakeup condition or interrupt disabled
1 Wakeup symbol received on FlexRay bus and interrupt enabled
11
FNEBIF
Receive FIFO channel B Not Empty Interrupt Flag — This ag is set when the receive FIFO for channel B is
not empty. If the application writes 1 to this bit, the FlexRay block updates the FIFO status, increments or wraps
FIFO B is now empty. If the FIFO is still not empty, the FlexRay block sets this ag again. The FlexRay block
generates the Receive FIFO B Not empty interrupt if the FNEBIE ag is asserted.
0 Receive FIFO B is empty or interrupt is disabled
1 Receive FIFO B is not empty and interrupt enabled
10
FNEAIF
Receive FIFO channel A Not Empty Interrupt Flag — This ag is set when the receive FIFO for channel A is
not empty. If the application writes 1 to this bit, the FlexRay block updates the FIFO status, increments or wraps
FIFO A is now empty. If the FIFO is still not empty, the FlexRay block sets this ag again. The FlexRay block
generates the Receive FIFO A Not empty interrupt if the FNEAIE ag is asserted.
0 Receive FIFO A is empty or interrupt is disabled
1 Receive FIFO A is not empty and interrupt enabled