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參數(shù)資料
型號(hào): SAK-XC2237M-104F40L
廠商: Infineon Technologies
文件頁(yè)數(shù): 80/107頁(yè)
文件大?。?/td> 0K
描述: IC MCU 16BIT 320KB FLASH 64LQFP
標(biāo)準(zhǔn)包裝: 1,900
系列: XC22xxM
核心處理器: C166SV2
芯體尺寸: 16/32-位
速度: 40MHz
連通性: CAN,EBI/EMI,I²C,LIN,SPI,SSC,UART/USART,USI
外圍設(shè)備: I²S,POR,PWM,WDT
輸入/輸出數(shù): 38
程序存儲(chǔ)器容量: 832KB(832K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 50K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 9x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 64-LQFP
包裝: 帶卷 (TR)
其它名稱: SP000720382
XC2238M, XC2237M
XC2000 Family / Base Line
Electrical Parameters
Data Sheet
74
V2.1, 2011-07
Broken wire detection
delay against VAGND
2)
t
BWG CC
50
3)
Broken wire detection
delay against VAREF
t
BWR CC
50
4)
Conversion time for 8-bit
t
c8 CC
(11 + STC) x
t
ADCI
+ 2 x
t
SYS
Conversion time for 10-bit
t
c10 CC
(13 + STC) x
t
ADCI
+ 2 x
t
SYS
Total Unadjusted Error
|TUE|
CC
12
LSB
5)
Wakeup time from analog
powerdown, fast mode
t
WAF CC
4
μs
Wakeup time from analog
powerdown, slow mode
t
WAS CC
15
μs
Analog reference ground
V
AGND
SR
V
SS
- 0.05
1.5
V
Analog input voltage
range
V
AIN SR
V
AGND
V
AREF
V
6)
Analog reference voltage
V
AREF
SR
V
AGND
+ 1.0
V
DDPA
+ 0.05
V
1) These parameter values cover the complete operating range. Under relaxed operating conditions (room
temperature, nominal supply voltage) the typical values can be used for calculation.
2) This parameter includes the sample time (also the additional sample time specified by STC), the time to
determine the digital result and the time to load the result register with the conversion result. Values for the
basic clock
t
ADCI depend on programming.
3) The broken wire detection delay against
V
AGND is measured in numbers of consecutive precharge cycles at a
conversion rate of not more than 500 s. Result below 10% (66
H).
4) The broken wire detection delay against
V
AREF is measured in numbers of consecutive precharge cycles at a
conversion rate of not more than 10 s. This function is influenced by leakage current, in particular at high
temperature. Result above 80% (332
H).
5) TUE is tested at
V
AREF = VDDPA = 5.0 V, VAGND = 0 V. It is verified by design for all other voltages within the
defined voltage range. The specified TUE is valid only if the absolute sum of input overload currents on analog
port pins (see
I
OV specification) does not exceed 10 mA, and if VAREF and VAGND remain stable during the
measurement time.
6)
V
AIN may exceed VAGND or VAREF up to the absolute maximum ratings. However, the conversion result in these
cases will be X000
H or X3FFH, respectively.
Table 18
ADC Parameters
(cont’d)
Parameter
Symbol
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
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