參數(shù)資料
型號(hào)： SAF-XC2735X-72F80L
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： RISC MICROCONTROLLER, PQFP64
封裝： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-64
文件頁(yè)數(shù)： 81/101頁(yè)
文件大小： 862K
代理商： SAF-XC2735X-72F80L
XC2735X
XC2000 Family Derivatives / Base Line
Electrical Parameters
Data Sheet
80
V2.0, 2009-03
4.6.2
Definition of Internal Timing
The internal operation of the XC2735X is controlled by the internal system clock
f
SYS.
Because the system clock signal
f
SYS can be generated from a number of internal and
external sources using different mechanisms, the duration of the system clock periods
(TCSs) and their variation (as well as the derived external timing) depend on the
mechanism used to generate
f
SYS. This must be considered when calculating the timing
for the XC2735X.
Figure 18
Generation Mechanisms for the System Clock
Note: The example of PLL operation shown in Figure 18 uses a PLL factor of 1:4; the
example of prescaler operation uses a divider factor of 2:1.
The specification of the external timing (AC Characteristics) depends on the period of the
system clock (TCS).
MC_XC2X_CLOCKGEN
Phase Locked Loop Operation (1:N)
f
IN
Direct Clock Drive (1:1)
Prescaler Operation (N:1)
f
SYS
f
IN
f
SYS
f
IN
f
SYS
TCS
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