參數(shù)資料
型號： SAF-XC2735X-72F80L
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： RISC MICROCONTROLLER, PQFP64
封裝： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-64
文件頁數(shù)： 30/101頁
文件大?。?/td> 862K
代理商： SAF-XC2735X-72F80L
XC2735X
XC2000 Family Derivatives / Base Line
Functional Description
Data Sheet
34
V2.0, 2009-03
Note: Vector locations without an associated interrupt control register are not assigned
and are reserved.
xx’0194H
65H / 101D
xx’0198H
66H / 102D
xx’019CH
67H / 103D
SCU External Request 0
SCU_ERU_0IC xx’01A0H
68H / 104D
SCU External Request 1
SCU_ERU_1IC xx’01A4H
69H / 105D
SCU External Request 2
SCU_ERU_2IC xx’01A8H
6AH / 106D
SCU Request 1
SCU_1IC
xx’01ACH
6BH / 107D
SCU Request 0
SCU_0IC
xx’01B0H
6CH / 108D
SCU External Request 3
SCU_ERU_3IC xx’01B4H
6DH / 109D
RTC
RTC_IC
xx’01B8H
6EH / 110D
End of PEC Subchannel
EOPIC
xx’01BCH
6FH / 111D
1) Register VECSEG defines the segment where the vector table is located.
Bitfield VECSC in register CPUCON1 defines the distance between two adjacent vectors. This table
represents the default setting with a distance of 4 (two words) between two vectors.
Table 7
XC2735X Interrupt Nodes (cont’d)
Source of Interrupt or PEC
Service Request
Control
Register
Vector
Location1)
Trap
Number
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