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參數(shù)資料
| 型號： | SAA7325 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital servo processor and Compact Disc decoder with integrated DAC (CD10 II)(具有綜合數(shù)模轉換器（DAC）的數(shù)字伺服處理器和光盤譯碼器) |
| 中文描述： | 數(shù)字伺服處理器和光盤解碼器集成了援會（CD10型二）（具有綜合數(shù)模轉換器（DAC）的的數(shù)字伺服處理器和光盤譯碼器） |
| 文件頁數(shù)： | 52/68頁 |
| 文件大?。?/td> | 281K |
| 代理商： | SAA7325 |
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2000 Jun 26
52
Philips Semiconductors
Product specification
Digital servo processor and Compact Disc
decoder with integrated DAC (CD10 II)
SAA7325
Notes
1.
2.
3.
Assumes use of external components as shown in the application diagram (Figs 0 or 39).
Highest clock frequency at which data slicer produces 1010 output in analog self-test mode.
The maximum input current depends on the value of the external resistor connected to I
ref
and the settings of shadow
registers A and C:
a) With R
Iref
= 30 k
, minimum I
max
= (0.025). I
ref
(0.025)
×
(40
μ
A) = 1
μ
A.
b) With R
Iref
= 30 k
, maximum I
max
= (0.4). I
ref
(0.4)
×
(40
μ
A) = 16
μ
A.
V
RIN
can be set to an internal source or an externally applied reference voltage using shadow register 7.
Measuring bandwidth: 200 Hz to 20 kHz, f
i(ADC)
= 1 kHz.
f
ripple
= 1 kHz, V
ripple
= 0.5 V (p-p).
Gain of the ADC is defined as G
ADC
= f
sys
/I
max
(counts/
μ
A); thus digital output = I
i
×
G
ADC
where:
a) Digital output = the number of pulses at the digital output in counts/s and I
i
= the DC input current in
μ
A.
b) The maximum input current depends on R
Iref
and on shadow registers A and C.
c) The gain tolerance is the deviation from the calculated gain.
4.
5.
6.
7.
Crystal oscillator
I
NPUT
: CRIN (
EXTERNAL CLOCK
)
V
IL
V
IH
I
LI
C
i
O
UTPUT
: CROUT; see Figs 3 and 4
LOW-level input voltage
HIGH-level input voltage
input leakage current
input capacitance
0.3
0.8V
DD
10
+0.2V
DD
V
DD
+ 0.3
+10
10
V
V
μ
A
pF
f
xtal
g
m
crystal frequency
mutual conductance at
start-up
feedback capacitance
output capacitance
±
100 ppm
17
8.4672
35
MHz
mA/V
C
fb
C
o
2
7
pF
pF
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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