參數(shù)資料
型號: SAA7188A
廠商: NXP Semiconductors N.V.
英文描述: Digital Video Encoder (DENC2-M)(數(shù)字視頻編碼器(DENC2-M))
中文描述: 數(shù)字視頻編碼器(DENC2米)(數(shù)字視頻編碼器(DENC2米))
文件頁數(shù): 28/36頁
文件大?。?/td> 252K
代理商: SAA7188A
1996 Jul 08
28
Philips Semiconductors
Preliminary specification
Digital Video Encoder (DENC2-M)
SAA7188A
Fig.7 Clock data timing.
handbook, full pagewidth
MBE742
LLC clock output
0.6 V
1.5 V
2.6 V
2.0 V
0.8 V
2.4 V
0.6 V
input data
output data
not valid
valid
valid
not valid
valid
valid
LLC clock input
0.8 V
1.5 V
2.4 V
tHIGH
tHD; DAT
TLLC
tHIGH
TLLC
td
tHD; DAT
tHD; DAT
tSU; DAT
tf
tf
tr
tr
Fig.8 Digital TV timing.
The data demultiplexing phase is coupled to the internal horizontal phase.
The CREF signal applies only for the 16 lines digital TV format, because these signals are only valid in 13.5 MHz.
The phase of the RCV2 signal is programmed to 0F9H (115H for 50 Hz) in this example in output mode (BRCV2).
handbook, full pagewidth
CREF
VP(n)
Y(0)
Cb(0)
Y(1)
Cr(0)
Y(2)
Cb(2)
Y(3)
Cr(2)
Y(4)
Cb(4)
DP(n)
RCV2
MBE739
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