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參數(shù)資料
| 型號： | SAA7188A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital Video Encoder (DENC2-M)(數(shù)字視頻編碼器(DENC2-M)) |
| 中文描述： | 數(shù)字視頻編碼器（DENC2米）（數(shù)字視頻編碼器（DENC2米）） |
| 文件頁數(shù)： | 16/36頁 |
| 文件大?。?/td> | 252K |
| 代理商： | SAA7188A |
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1996 Jul 08
16
Philips Semiconductors
Preliminary specification
Digital Video Encoder (DENC2-M)
SAA7188A
Table 14
Subaddress 60 (CCRS; select cross colour reduction filter in luminance)
Table 15
Subaddress 61
DATA BYTE
FUNCTION
CCRS1
CCRS0
0
0
1
1
0
1
0
1
no cross colour reduction (for overall transfer characteristic of luminance see Fig.5)
cross colour reduction #1 active (for overall transfer characteristic see Fig.5)
cross colour reduction #2 active (for overall transfer characteristic see Fig.5)
cross colour reduction #3 active (for overall transfer characteristic see Fig.5)
DATA BYTE
LOGIC LEVEL
DESCRIPTION
FISE
0
1
0
1
0
864 total pixel clocks per line
858 total pixel clocks per line; default after reset
NTSC encoding (non-alternating V component); default after reset
PAL encoding (alternating V component)
enlarged bandwidth for chrominance encoding (for overall transfer characteristic of
chrominance in baseband representation see Figs 3 and 4)
standard bandwidth for chrominance encoding (for overall transfer characteristic of
chrominance in baseband representation see Figs 3 and 4); default after reset
no real time control of generated subcarrier frequency; default after reset
real time control of generated subcarrier frequency through SAA7151B
(timing see Fig.9)
luminance gain for white-to-black 100 IRE
luminance gain for white-to-black 92.5 IRE including 7.5 IRE set-up of black;
default after reset
PAL switch phase is nominal; default after reset
PAL switch phase is inverted compared to nominal
DACs in normal operational mode; default after reset
DACs forced to lowest output voltage
PAL
SCBW
1
RTCE
0
1
YGS
0
1
INPI
0
1
0
1
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| SAA7188AWP | 制造商:NXP Semiconductors 功能描述:COLOR SIGNAL ENCODER, PQCC68 |
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