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參數(shù)資料
| 型號： | SAA7188A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital Video Encoder (DENC2-M)(數(shù)字視頻編碼器(DENC2-M)) |
| 中文描述： | 數(shù)字視頻編碼器（DENC2米）（數(shù)字視頻編碼器（DENC2米）） |
| 文件頁數(shù)： | 2/36頁 |
| 文件大?。?/td> | 252K |
| 代理商： | SAA7188A |
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1996 Jul 08
2
Philips Semiconductors
Preliminary specification
Digital Video Encoder (DENC2-M)
SAA7188A
FEATURES
CMOS 5 V device
Digital PAL/NTSC encoder
System pixel frequency 13.5 MHz
Accepts MPEG decoded data
8-bit wide MPEG port
Input data format Cb, Y, Cr, etc. (CCIR 656)
16-bit wide YUV input port
I
2
C-bus control port or alternatively MPU parallel
control port
Encoder can be master or slave
Programmable horizontal and vertical input
synchronization phase
Programmable horizontal sync output phase
OSD overlay with Look-Up Tables (LUTs) 8
×
3 bytes
Colour bar generator
Line 21 Closed Caption encoder
Macrovision Pay-per-View copy protection system as
option
The device is protected by USA patent numbers
4631603, 4577216 and 4819098 and other intellectual
property rights. Use of the Macrovision anti-copy
process in the device is licensed for non-commercial
home use only, which is its sole intended use in
this device.
Please contact your nearest Philips Semiconductors
sales office for more information.
Cross-colour reduction
DACs operating at 27 MHz with 10-bit resolution
Controlled rise/fall times of output syncs and blanking
Down-mode of DACs
CVBS and S-Video output simultaneously
PLCC68 package.
GENERAL DESCRIPTION
The SAA7188A encodes digital YUV video data to an
NTSC, PAL CVBS or S-Video signal.
The circuit accepts CCIR compatible YUV data with
720 active pixels per line in 4 : 2 : 2 multiplexed formats,
e.g. MPEG decoded data. It includes a sync/clock
generator and on-chip Digital-to-Analog Converters
(DACs).
The circuit is compatible to the DIG-TV2 chip family.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
V
DDA
V
DDD
I
DDA
I
DDD
V
i
V
o(p-p)
analog supply voltage
digital supply voltage
analog supply current
digital supply current
input signal voltage levels
analog output signal voltages Y, C and CVBS without load
(peak-to-peak value)
load resistance
LF integral linearity error
LF differential linearity error
operating ambient temperature
4.75
4.5
5.0
5.0
50
140
5.25
5.5
55
170
V
V
mA
mA
TTL compatible
2
V
R
L
ILE
DLE
T
amb
80
0
±
2
±
1
+70
LSB
LSB
°
C
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|---|---|
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| SAA7191WP | 制造商:NXP Semiconductors 功能描述:7191WP |
| SAA7192A/AA68A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
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