- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385813 > SAA7188A (NXP Semiconductors N.V.) Digital Video Encoder (DENC2-M)(數(shù)字視頻編碼器(DENC2-M)) PDF資料下載
參數(shù)資料
| 型號： | SAA7188A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital Video Encoder (DENC2-M)(數(shù)字視頻編碼器(DENC2-M)) |
| 中文描述： | 數(shù)字視頻編碼器（DENC2米）（數(shù)字視頻編碼器（DENC2米）） |
| 文件頁數(shù)： | 19/36頁 |
| 文件大小： | 252K |
| 代理商： | SAA7188A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
1996 Jul 08
19
Philips Semiconductors
Preliminary specification
Digital Video Encoder (DENC2-M)
SAA7188A
Table 21
Subaddress 6C
Table 22
Logic levels and function of SRCV1
Table 23
Subaddress 6D
DATA BYTE
LOGIC LEVEL
DESCRIPTION
PRCV2
0
polarity of RCV2 as output is active HIGH, rising edge is taken when input,
respectively; default after reset
polarity of RCV2 as output is active LOW, falling edge is taken when input,
respectively
pin RCV2 is switched to input; default after reset
pin RCV2 is switched to output
if ORCV2 = HIGH, pin RCV2 provides an HREF signal (Horizontal Reference Pulse
that is HIGH during active portion of line, also during vertical blanking Interval);
default after reset
1
ORCV2
0
1
0
CBLF
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization only
(if TRCV2 = 1); default after reset
if ORCV2 = HIGH, pin RCV2 provides a CBN signal (reference pulse that is HIGH
during active video, excluding vertical blanking interval)
1
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization
(if TRCV2 = 1) also as an internal blanking signal
polarity of RCV1 as output is active HIGH, rising edge is taken when input,
respectively; default after reset
polarity of RCV1 as output is active LOW, falling edge is taken when input,
respectively
pin RCV1 is switched to input; default after reset
pin RCV1 is switched to output
horizontal synchronization is taken from RCV1 port; default after reset
horizontal synchronization is taken from RCV2 port
defines signal type on pin RCV1; see Table 22
PRCV1
0
1
ORCV1
0
1
0
1
TRCV2
SRCV1
DATA BYTE
AS OUTPUT
AS INPUT
FUNCTION
SRCV11
SRCV10
0
0
1
0
1
0
VS
FS
VS
FS
Vertical Sync each field; default after reset
Frame Sync (odd/even)
Field Sequence, vertical sync every fourth field
(FISE = 1) or eighth field (FISE = 0)
not applicable
FSEQ
FSEQ
1
1
DATA BYTE
DESCRIPTION
CCEN
SRCM
enables individual line 21 encoding; see Table 24
defines signal type on pin RCM1; see Table 25
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7201 | Integrated MPEG2 AVG Decoder(綜合MPEG音頻視頻圖表譯碼器) |
| SAA7201H | Integrated MPEG2 AVG decoder |
| SAA7212 | Integrated MPEG2 AVG Decoder(綜合MPEG音頻視頻圖表譯碼器) |
| SAA7212H | Integrated MPEG AVG decoder |
| SAA7219 | MPEG2 Transport RISC Processor(MPEG2 傳送RISC處理器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7188AWP | 制造商:NXP Semiconductors 功能描述:COLOR SIGNAL ENCODER, PQCC68 |
| SAA7191B | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Multistandard Colour Decoder, Square Pixel DMSD-SQP |
| SAA7191WP | 制造商:NXP Semiconductors 功能描述:7191WP |
| SAA7192A/AA68A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| SAA7192AWP | 制造商:NXP Semiconductors 功能描述:IMAGE PROCESSOR, 68 Pin, Plastic, PLCC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。