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參數(shù)資料
| 型號(hào)： | S71GL128NC0BAWAZ0 |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲(chǔ)器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA84 |
| 封裝： | 8 X 11.60 MM, 1.20 MM HEIGHT, LEAD FREE COMPLIANT, FBGA-84 |
| 文件頁(yè)數(shù)： | 109/122頁(yè) |
| 文件大?。?/td> | 1764K |
| 代理商： | S71GL128NC0BAWAZ0 |
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December 15, 2004 S29GLxxxN_MCP_A1
S29GLxxxN MirrorBitTM Flash Family
87
Ad vance
Info rmat i o n
Figure 6. Toggle Bit Algorithm
DQ2: Toggle Bit II
The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular
sector is actively erasing (that is, the Embedded Erase algorithm is in progress),
or whether that sector is erase-suspended. Toggle Bit II is valid after the rising
edge of the final WE# pulse in the command sequence.
DQ2 toggles when the system reads at addresses within those sectors that have
been selected for erasure. (The system may use either OE# or CE# to control the
START
No
Yes
DQ5 = 1?
No
Yes
DQ6 = Toggle?
No
Read Byte
(DQ0-DQ7)
Address = VA
DQ6 = Toggle?
Read Byte Twice
(DQ 0-DQ7)
Adrdess = VA
Read Byte
(DQ0-DQ7)
Address = VA
FAIL
PASS
Note: The system should recheck the toggle bit even
if DQ5 = “1” because the toggle bit may stop
toggling as DQ5 changes to “1.” See the subsections
on DQ6 and DQ2 for more information.
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