參數(shù)資料
型號: S29GL128N11FFIVH2
廠商: SPANSION LLC
元件分類: PROM
英文描述: 16M X 16 FLASH 3V PROM, 110 ns, PBGA64
封裝: 10 X 13 MM, 1 MM PITCH, LEAD FREE, FBGA-64
文件頁數(shù): 59/74頁
文件大?。?/td> 1593K
代理商: S29GL128N11FFIVH2
60
S29GL-N
S29GL-N_01_A0 May 1, 2006
Da ta
Sh e e t
Figure 18.2 Page Read Timings
Note
* Figure shows word mode. Addresses are A2–A-1 for byte mode.
18.2
Hardware Reset (RESET#)
Notes
1. Not 100% tested. If ramp rate is equal to or faster than 1V/100s with a falling edge of the RESET# pin initiated, the RESET# pin needs
to be held low only for 100s for power-up.
2. Next generation devices may have different reset speeds. To increase system design considerations, please refer to Advance Information
on S29GL-P Hardware Reset (RESET#) and Power-up Sequence on page 70 for advance reset speeds on S29GL---P devices.
Amax-A2
CE#
OE#
A2-A0*
Data Bus
Same Page
Aa
Ab
Ac
Ad
Qa
Qb
Qc
Qd
tACC
tPACC
Parameter
Description
Speed (Note 2)
Unit
JEDEC
Std.
tReady
RESET# Pin Low (During Embedded Algorithms) to Read Mode
(Note 1, 2)
Max
20
ns
tReady
RESET# Pin Low (NOT During Embedded Algorithms) to Read
Mode (Note 1, 2)
Max
500
ns
tRP
RESET# Pulse Width
Min
500
ns
tRH
Reset High Time Before Read ((Note 1, 2)
Min
50
ns
tRPD
RESET# Low to Standby Mode
Min
20
s
tRB
RY/BY# Recovery Time
Min
0
ns
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