參數(shù)資料
型號(hào)： S29GL128N11FAIVH0
廠商： SPANSION LLC
元件分類： PROM
英文描述： 16M X 16 FLASH 3V PROM, 110 ns, PBGA64
封裝： 10 X 13 MM, 1 MM PITCH, FBGA-64
文件頁數(shù)： 46/74頁
文件大?。?/td> 1593K
代理商： S29GL128N11FAIVH0
48
S29GL-N
S29GL-N_01_A0 May 1, 2006
Da ta
Sh e e t
Legend
X = Don’t care.
RA = Read Address.
RD = Read Data.
PA = Program Address. Addresses latch on the falling edge of WE# or CE# pulse, whichever occurs later.
PD = Program Data. Data latches on the rising edge of WE# or CE# pulse, whichever occurs first.
SA = Sector Address. Any address that falls within a specified sector. See Table 8.2 on page 14 and Table 8.3 on page 20 for sector address ranges.
WBL = Write Buffer Location. Address must be within the same write buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
Notes
1. See Table 8.1 on page 11 for description of bus operations.
2. All values are in hexadecimal.
3. Shaded cells indicate read cycles.
4. Address and data bits not specified in table, legend, or notes are don’t cares (each hex digit implies 4 bits of data).
5. Writing incorrect address and data values or writing them in the improper sequence may place the device in an unknown state. The system must write the reset
command to return reading array data.
6. No unlock or command cycles required when bank is reading array data.
7. Reset command is required to return to reading array data in certain cases. See Reset Command on page 34 for details.
8. Data in cycles 5 and 6 are listed in Table 8.4 on page 23.
9. The data is 00h for an unprotected sector and 01h for a protected sector. PPB Status Read provides the same data but in inverted form.
10. If DQ7 = 1, region is factory serialized and protected. If DQ7 = 0, region is unserialized and unprotected when shipped from factory. See Secured Silicon Sector
Flash Memory Region on page 29 for more information.
11. Command is valid when device is ready to read array data or when device is in autoselect mode.
12. Total number of cycles in the command sequence is determined by the number of words written to the write buffer.
13. Command sequence resets device for next command after write-to-buffer operation.
14. Requires Entry command sequence prior to execution. Unlock Bypass Reset command is required to return to reading array data.
15. System may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase Suspend command is valid
only during a sector erase operation.
16. Erase Resume command is valid only during the Erase Suspend mode.
17. Requires Entry command sequence prior to execution. Secured Silicon Sector Exit Reset command is required to exit this mode; device may otherwise be
placed in an unknown state.
Table 11.3 Memory Array Commands (x8)
Command Sequence
(Notes)
Cyc
les
Bus Cycles (Notes 1–5)
First
Second
Third
Fourth
Fifth
Sixth
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Asynchronous Read (6)
1RA
RD
Reset (7)
1
XXX
F0
Au
to
-
sele
ct
Manufacturer ID
4
AAA
AA
555
55
AAA
90
X00
01
Device ID (8)
6
AAA
AA
555
55
AAA
90
X02
XX7E
X1C
Data
X1E
Data
Sector Protect Verify (9)
4
AAA
AA
555
55
AAA
90
[SA]X04
Data
Secure Device Verify (10)
4
AAA
AA
555
55
AAA
90
X06
Data
CFI Query (11)
1AA
98
Program
4
AAA
AA
555
55
AAA
A0
PA
PD
Write to Buffer (12)
6
AAA
AA
555
55
PA
25
SA
WC
PA
PD
WBL
PD
Program Buffer to Flash
1
SA
29
Write to Buffer Abort Reset (13)
3
AAA
AA
PA
55
555
F0
Unloc
k
By
pass
Mo
de
Entry
3
AAA
AA
555
55
AAA
20
Program (14)
2
XXX
A0
PA
PD
Sector Erase (14)
2
XXX
80
SA
30
Chip Erase (14)
2
XXX
80
SA
10
Reset
2
XXX
90
XXX
00
Chip Erase
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
AAA
10
Sector Erase
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
SA
30
Erase/Program Suspend (15)
1
XXX
B0
Erase/Program Resume (16)
1
XXX
30
Secure
d
Silicon
Secto
r
Entry
3
AAA
AA
555
55
AAA
88
Program (17)
4
AAA
AA
555
55
AAA
A0
PA
PD
Read (17)
100
Data
Exit (17)
4
AAA
AA
555
55
AAA
90
XXX
00
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