- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄192300 > S29GL064A10BAIW12 (SPANSION LLC) 4M X 16 FLASH 3V PROM, 100 ns, PBGA64 PDF資料下載
參數(shù)資料
| 型號(hào)： | S29GL064A10BAIW12 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 4M X 16 FLASH 3V PROM, 100 ns, PBGA64 |
| 封裝： | FBGA-64 |
| 文件頁數(shù)： | 17/97頁 |
| 文件大?。?/td> | 3490K |
| 代理商： | S29GL064A10BAIW12 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁
22
S29GL-A MirrorBit Flash Family
S29GL-A_00_A5 January 11, 2006
Prel imi n ary
Automatic Sleep Mode
The automatic sleep mode minimizes Flash device energy consumption. The de-
vice automatically enables this mode when addresses remain stable for tACC +
30 ns. The automatic sleep mode is independent of the CE#, WE#, and OE# con-
trol signals. Standard address access timings provide new data when addresses
are changed. While in sleep mode, output data is latched and always available
to the system. Refer to the DC Characteristics on page 71 for the automatic
sleep mode current specification.
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of resetting the device to reading
array data. When the RESET# pin is driven low for at least a period of tRP, the
device immediately terminates any operation in progress, tristates all output
pins, and ignores all read/write commands for the duration of the RESET# pulse.
The device also resets the internal state machine to reading array data. The op-
eration that was interrupted should be reinitiated once the device is ready to
accept another command sequence, to ensure data integrity.
Current is reduced for the duration of the RESET# pulse. When RESET# is held
at VSS±0.3 V, the device draws CMOS standby current (ICC5). If RESET# is held
at VIL but not within VSS±0.3 V, the standby current is greater.
The RESET# pin may be tied to the system reset circuitry. A system reset would
thus also reset the Flash memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
Refer to the AC Characteristics tables for RESET# parameters and to Figure 15,
on page 75 for the timing diagram.
Output Disable Mode
When the OE# input is at VIH, output from the device is disabled. The output
pins are placed in the high impedance state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29GL128N11FAIVH0 | 16M X 16 FLASH 3V PROM, 110 ns, PBGA64 |
| S29GL128N11FFIVH2 | 16M X 16 FLASH 3V PROM, 110 ns, PBGA64 |
| S29JL032J70TFI213 | 2M X 16 FLASH 3V PROM, 70 ns, PDSO48 |
| S29PL032J65BFI150 | 2M X 16 FLASH 3V PROM, 65 ns, PBGA56 |
| S29PL127J70BFI000 | 8M X 16 FLASH 3V PROM, 70 ns, PBGA80 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29GL064A10FAIR10 | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 64MBIT 8MX8/4MX16 100NS 64BGA - Trays |
| S29GL064A10FAIR50 | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 64MBIT 4MX16 100NS 64BGA - Trays |
| S29GL064A10FFIR30 | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 64MBIT 8MX8/4MX16 100NS 64BGA - Trays |
| S29GL064A10TAIR42 | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 64MBIT 8MX8/4MX16 100NS 48TSOP - Tape and Reel |
| S29GL064A10TAIR60 | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 64MBIT 4MX16 100NS 48TSOP - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。