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參數(shù)資料
| 型號(hào)： | S1C63408F0A0100 |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁(yè)數(shù)： | 82/151頁(yè) |
| 文件大?。?/td> | 1171K |
| 代理商： | S1C63408F0A0100 |
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28
EPSON
S1C63406/408 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Oscillation Circuit)
4.3.4 Switching of operating voltage
The CPU system clock is switched to OSC1 or OSC3 by the software (CLKCHG register). In this case, to
obtain stable operation, the operating voltage VD1 for the internal circuits must be switched by the
software (VDC1 and VDC0 registers). The power supply circuit supports the following four voltage
levels. When switching the VD1 level, select one according to the oscillation frequency.
1. VD1 = 1.1 V (VDC1, VDC0 = "0H")
This mode is provided for low-power operation. Set this mode when the system runs with the OSC1
clock (80 kHz Max.). Do not turn the OSC3 oscillation circuit on in this mode. The CLKCHG register is
disabled by the hardware in this mode.
2. VD1 = 1.3 V (VDC1, VDC0 = "1H")
Set this mode when using the OSC3 CR oscillation clock (700 kHz Max.). Do not set this mode if the
frequency is higher than 700 kHz or OSC3 is not CR oscillation circuit.
3. VD1 = 1.5 V (VDC1, VDC0 = "2H")
Set this mode when using the OSC3 CR oscillation clock (2.2 MHz Max.). Do not set this mode if OSC3
is not CR oscillation circuit or the OSC3 CR oscillation clock more than 2.2 MHz is used. This mode
can be set even if a 700 kHz or less OSC3 CR oscillation clock is used. However it is not recommended
for low-power operation.
4. VD1 = 1.7 V (VDC1, VDC0 = "3H")
Set this mode when using the OSC3 crystal, ceramic or CR oscillation clock (4.2 MHz Max.). This
mode can be set even if the OSC3 CR oscillation clock less than 2.2 MHz is used. However it is not
recommended for low-power operation.
When OSC3 is to be used as the CPU system clock, it should be done as the following procedure using
the software: first switch the operating voltage VD1, turn the OSC3 oscillation ON after waiting 2.5 msec
or more for the above operation to stabilize, switch the clock after waiting 5 msec or more for oscillation
stabilization.
When switching from OSC3 to OSC1, turn the OSC3 oscillation circuit OFF after switching the clock then
set the operating voltage VD1 to 1.1 V.
OSC1
→ OSC3
OSC3
→ OSC1
1. Set VDC (1 and 0) to "1", "2" or "3".
1. Set CLKCHG to "0" (OSC3
→ OSC1).
2. Maintain 2.5 msec or more.
2. Set OSCC to "0" (OSC3 oscillation OFF).
3. Set OSCC to "1" (OSC3 oscillation ON).
3. Set VDC (1 and 0) to "0" (VD1 = 1.1 V).
4. Maintain 5 msec or more.
5. Set CLKCHG to "1" (OSC1
→ OSC3).
4.3.5 Clock frequency and instruction execution time
Table 4.3.5.1 shows the instruction execution time according to each frequency of the system clock.
Table 4.3.5.1 Clock frequency and instruction execution time
Clock frequency
OSC1: 32.768 kHz
OSC1: 60 kHz
OSC3: 2 MHz
OSC3: 3.58 MHz
OSC3: 4 MHz
Instruction execution time (
sec)
1-cycle instruction
2-cycle instruction
3-cycle instruction
61
122
183
33
67
100
123
0.56
1.12
1.68
0.5
1
1.5
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