參數(shù)資料
型號: S1C60N01F
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, PQFP48
封裝: PLASTIC, QFP12-48
文件頁數(shù): 71/153頁
文件大?。?/td> 901K
代理商: S1C60N01F
I-12
EPSON
S1C60N01 TECHNICAL HARDWARE
CHAPTER 3: CPU, ROM, RAM
3.2 ROM
The built-in ROM, a mask ROM for the program, has a
capacity of 1,024
× 12-bit steps. The program area is 4
pages (0–3), each consisting of 256 steps (00H–FFH). After
an initial reset, the program start address is page 1, step
00H. The interrupt vector is allocated to page l, steps 01H–
07H.
3.3
Fig. 3.2.1
ROM configuration
RAM
The RAM, a data memory for storing a variety of data, has a
capacity of 80 words, 4-bit words. When programming,
keep the following points in mind:
(1) Part of the data memory is used as stack area when
saving subroutine return addresses and registers, so be
careful not to overlap the data area and stack area.
(2) Subroutine calls and interrupts take up three words on
the stack.
(3) Data memory 000H–00FH is the memory area pointed by
the register pointer (RP).
00H step
07H step
08H step
FFH step
12 bits
Program start address
Interrupt vector area
Bank 0
Program area
0 page
1 page
2 page
3 page
01H step
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