參數(shù)資料
型號: S1C60N01F
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, PQFP48
封裝: PLASTIC, QFP12-48
文件頁數(shù): 40/153頁
文件大?。?/td> 901K
代理商: S1C60N01F
II-46
EPSON
S1C60N01 TECHNICAL SOFTWARE
CHAPTER 3: PERIPHERAL CIRCUITS (Interrupt and Halt)
If the EI instruction is executed without resetting the inter-
rupt factor flag after generating the timer interrupt, and if
the corresponding interrupt mask register is still "1", the
same interrupt is generated once more. (See Figure 3.8.5.)
If the EI state is set without resetting the interrupt factor
flag after generating the input interrupt (K00–K03), the same
interrupt is generated once more. (See Figure 3.8.5.)
The interrupt factor flag must always be read (reset) in the
DI state (interrupt flag [I] = "0"). There may be an operation
error if read in the EI state.
The timer interrupt factor flags (IT32, IT8, IT2) and the
stopwatch interrupt factor flags (ISW1, ISW0) are set
whether the corresponding interrupt mask register is set or
not.
The input interrupt factor flag (IK0) is allowed to be set in
the condition when the corresponding interrupt mask regis-
ter (EIK00–EIK03) is set to "1" (interrupt is enabled). (See
Figure 3.8.5.)
Table 3.8.2 shows the interrupt vector map.
Addesses (start address of interrupt processing routines) to
jump to are written into the addresses available for interrupt
vector allocation.
Table 3.8.2
Interrupt vector map
Step
Interrupt Vector
Initial reset
Clock timer interrupt
Input (K00–K03) interrupt
Input interrupt and clock timer interrupt
Page
00H
01H
04H
05H
1
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