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參數(shù)資料
| 型號： | RV5C386A-E2 |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | XO, clock |
| 英文描述： | I2C-bus Real-Time Clock ICs with Voltage Monitoring Function |
| 中文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO10 |
| 封裝： | 4 X 2.90 MM, 1.20 MM HEIGHT, SSOP-10 |
| 文件頁數(shù)： | 16/42頁 |
| 文件大?。?/td> | 362K |
| 代理商： | RV5C386A-E2 |
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RV5C386A PRELIMINARY
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- 16 -
F6 to F0 bits
The Oscillation Adjustment Circuit is configured to change time counts of 1 second on the basis of the settings
of
the Oscillation Adjustment Register when the second digits read 00, 20, or 40 seconds. Normally, the Second
Counter is incremented once per 32768 32.768-kHz clock pulses generated by the crystal oscillator. Writing to
the F6 to F0 bits activates the oscillation adjustment circuit.
* The Oscillation Adjustment Circuit will not operate with the same
as the timing of writing to the Oscillation Adjustment Register.
* The F6 bit setting of 0 causes an increment of time counts by ((F5, F4, F3, F2, F1, F0) - 1) x 2.
The F6 bit setting of 1 causes a decrement of time counts by ((/F5, /F4, /F3, /F2, /F1, /F0) + 1) x 2.
The settings of "*, 0, 0, 0, 0, 0, *" ("*" representing either "0" or "1") in the F6, F5, F4, F3, F2, F1, and F0
bits cause neither an increment nor decrement of time counts.
Example:
When the second digits read 00, 20, or 40, the settings of "0, 0, 0, 0, 1, 1, 1" in the F6, F5, F4, F3, F2, F1, and F0
bits cause an increment of the current time counts of 32768 by (7 - 1) x 2 to 32780 (a current time count loss).
When the second digits read 00, 20, or 40, the settings of "0, 0, 0, 0, 0, 0, 1" in the F6, F5, F4, F3, F2, F1, and F0
bits cause neither an increment nor a decrement of the current time counts of 32768.
When the second digits read 00, 20, or 40, the settings of "1, 1, 1, 1, 1, 1, 0" in the F6, F5, F4, F3, F2, F1, and F0
bits cause a decrement of the current time counts of 32768 by (- 2) x 2 to 32764 (a current time count gain).
An increase of two clock pulses once per 20 seconds causes a time count loss of approximately 3 ppm (2 / (32768
x 20 = 3.051 ppm). Conversely, a decrease of two clock pulses once per 20 seconds causes a time count gain of
3 ppm. Consequently, deviations in time counts can be corrected with a precision of
±
1.5 ppm. Note that the
oscillation adjustment circuit is configured to correct deviations in time counts and not the oscillation frequency of
the 32.768-kHz clock pulses. For further details, see "14. 2. 4. Oscillation Adjustment Circuit".
Alarm_W Registers (Address 8-Ah)
timing (00, 20, or 40 seconds)
13.2.7.
Alarm_W Minute Register (Address 8h)
D7
D6
-
WM40
0
WM40
0
Indefinite
D5
D4
D3
WM8
WM8
Indefinite
D2
WM4
WM4
Indefinite
D1
WM2
WM2
Indefinite
D0
WM1
WM1
Indefinite
WM20
WM20
Indefinite
WM10
WM10
Indefinite
(For Writing)
(For Reading)
Default Settings *)
Alarm_W Hour Register (Address 9h)
D7
D6
-
-
D5
D4
D3
WH8
D2
WH4
D1
WH2
D0
WH1
WH20
WP
/A
WH20
WP
/A
Indefinite
WH10
(For Writing)
0
0
WH10
WH8
WH4
WH2
WH1
(For Reading)
0
0
Indefinite
Indefinite
Indefinite
Indefinite
Indefinite
Default Settings *)
Alarm_W Day-of-week Register (Address Ah)
D7
D6
-
WW6
WW5
0
WW6
WW5
0
Indefinite
Indefinite
*) Default settings: Default value means read/written values when the XSTP bit is set to “1” due to power-on
from 0 volts or supply voltage drop.
* The D5 bit of the Alarm_W Hour Register represents WP/A when the 12-hour mode is selected (0 for a.m. and
1 for p.m.)
and WH20 when the 24-hour mode is selected (tens in the hour digits)
.
* The Alarm_W Registers should not have any non-existent alarm time settings.
D5
D4
D3
D2
D1
D0
WW4
WW4
Indefinite
WW3
WW3
Indefinite
WW2
WW2
Indefinite
WW1
WW1
Indefinite
WW0
WW0
Indefinite
(For Writing)
(For Reading)
Default Settings *)
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| RV5C387A-E2 | 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:I2C-bus Real-Time Clock ICs with Voltage Monitoring Function |
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