參數(shù)資料
型號(hào): RS5C313
廠商: RICOH COMPANY LTD
元件分類: XO, clock
英文描述: PrimeSTACK up to 1700V Half Bridge
中文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO8
封裝: 0.65 MM PITCH, SSOP-8
文件頁(yè)數(shù): 27/32頁(yè)
文件大?。?/td> 267K
代理商: RS5C313
When using the XSTP bit
Ensure stable oscillation by preventing the following:
1) Condensation on the crystal oscillator
2) Instantaneous disconnection of power
3) Generation of clock noises, etc. in the crystal oscillator
4) Charge of voltage exceeding prescribed maximum ratings
to the individual pins of the IC
RS5C313
24
Start
XSTP=0
BSY=0
Interrupt cycle register
0h
Control register
3h, 7h
Control register
0h, 4h
Set clock and calendar
counters and interrupt cycles.
Wait or
other
operations.
Power-on
YES
No
YES
NO
*
1
*
2
*
3
*
4
*
6
*
5
11.1 Initialization upon Power-on
11. Typical Software-based Operations
*
1) Switch the CE pin to the low level immediately after power-on.
*
2) When not making oscillation halt sensing (data validity), the XSTP bit need
not be checked.
*
3) Turn off the INTR pin, whose output is uncertain at power-on.
*
4) Write to control register 3h for 12-hour format or 7h for 24-hour format. Set
the ADJ bit to 1 for checking oscillaiton.
*
5) It takes 0.1-2 seconds to be set the BSY bit to 0 from oscillation starting upon
power-on from 0V. Provide an exit from an oscillation start loop to prepare
for oscillation failure.
*
6) Set the XSTP bit to 0 by writing data to the control register.
0h for the 12-hour time display system.
4h for the 24-hour time display system.
11.2 Write Operation to Clock and Calendar Counters
BSY=0
Write to clock and
calendar counters.
CE=L
Wait or
other
operations.
CE=L
Control register
0h, 4h
CE=H
YES
NO
*
1
*
2
*
3
*
4
*
1) After switching the CE pin to the high level, hold it at the high level until any
subsequent operation requires switching it to the low level. (Note that
switching the CE pin to the low level sets the WTEN bit to 1.)
*
2) Write 0h for the 12-hour format or 4h for the 24-hour time display system.
*
3) The BSY bit is held at 1 for a maximum duration of 122.1 us.
*
4) Switch the CE pin to the low level to set the WTEN bit to 1.
During write operation to the clock and calendar counters, one 1-second
digit carry causes a 1-second increment while two 1-second digit carries
also cause only a 1-second increment, which, in turn, causes a time delay.
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