參數(shù)資料
型號: RS5C313
廠商: RICOH COMPANY LTD
元件分類: XO, clock
英文描述: PrimeSTACK up to 1700V Half Bridge
中文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO8
封裝: 0.65 MM PITCH, SSOP-8
文件頁數(shù): 23/32頁
文件大?。?/td> 267K
代理商: RS5C313
Note
Any rise or fall in ambient temperature from its reference value ranging from
20 to 25 degrees Celsius causes a time delay for a 32kHz crystal oscillator. It is
recommendable, therefore, to set slightly high oscillation frequency at room
temperature.
0
*
*
1
*
*
*
0
0
0
OFF
Interrupt halt
0
0
1
ON
Fixing the INTR pin at the low level
0
1
0
0.977ms
Cycle: 0.977ms (1/1024Hz) Duty: 50%
0
1
1
0.5s
Cycle: 0.5s (1/2Hz)
1
0
0
1 second
Every second
1
0
0
1
10 seconds
Every 10 seconds (For display of second digits: 00, 10, 20, 30, 40, and 50)
1
0
1
0
1 minute
Every minute (00 second)
1
0
1
1
10 minutes
Every 10 minutes (00 second) (For display of minute digits: 00, 10, 20, 30, 40, and 50)
1
1
0
0
1 hour
Every hour (00 minute and 00 second)
1
1
0
1
1 day
Every day (0 hour, 00 minute, and 00 second a.m.)
1
1
1
0
1 week
Every week (0 week, 0 hour, 00 minute, and 00 second a.m.)
1
1
1
1
1 month
Every month (1st day, 0 hour, 00 minute, and 00 second a.m.)
RS5C313
20
After adjustment, oscillation frequency is subject to fluctuations of an ambient temperature and supply voltage.
See “10. Typical Characteristic Measurements”.
Remarks
8.1 Selection of Interrupt Cycle
The interrupt cycle register can be used to select either one of two interrupt output modes: the pulse mode (when
the CT
3
bit is set to 0) and the level mode (when the CT
3
bit is set to 1).
Interrupt cycle register
CT
3
CT
2
CT
1
CT
0
INTR pin output
The INTR pin output, the interrupt cycle register, and the CTFG bit can be used to interrupt the CPU in a certain
cycle. (The INTR pin functions as an Nch open drain output.)
8. Interrupt Operation
*
1) The symbol “
*
” in the above table indicates 0 or 1.
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