參數(shù)資料
型號： RS5C313
廠商： RICOH COMPANY LTD
元件分類： XO, clock
英文描述： PrimeSTACK up to 1700V Half Bridge
中文描述： 0 TIMER(S), REAL TIME CLOCK, PDSO8
封裝： 0.65 MM PITCH, SSOP-8
文件頁數(shù)： 17/32頁
文件大?。?/td> 267K
代理商： RS5C313
RS5C313
14
The real-time clock becomes accessible by switching the CE pin from the low level to high level to enable interfac-
ing with the CPU and then inputting setting data (control bits and address bits) to the SIO pin in synchronization
with shift clock pulses from the SCLK pin.
The input data are registered in synchronization with the falling edge of the SCLK. When the data is read, the read
cycle shall be set by control bits.
R/W: Establishes the read mode when set to 1, and the write mode when set to 0.
AD: Writes succeeding address bits (A3 to A0) to the address register when set to 1 with the
DT bit set to 0 and performs no such write operation in any other case.
DT: Writes data bits (D3 to D0) to the counter or register specified by the address register
which has written just before when set to 1 with the R/W and AD bits set equally to 0 and
performs no such write operation in any other case.
A3 to A0: Inputs the bits MSB to LSB in the address table describing the functions.
Address bits
1.1 Read Cycle Flow
1. The CE pin is switched from the low level to the high level.
2. Four control bits (with the first bit ignored) and four read address bits are input from the SIO pin. At this time,
control bits R/W and AD are set equally to 1 while a control bit DT is set to 0.
3. The SIO pin enters the output mode at the rising edge of the shift clock pulse 2B from the SCLK pin while the
four read bits (MSB
→
LSB) at designated addresses are output at the rising edge of the shift clock pulse 5B (see
the figure below).
4. Then, the SIO pin returns to the input mode at the rising edge of the shift clock pulse 1C. Afterwards control bits and
address bits are input at the shift clock pulses 1C in the same manner as at the shift clock pulse 1A.
5. At the end of read cycle, the CE pin is switched from the high level to the low level (after
t
CEH
from the falling edge of
the eighth shift clock pulse from the SCLK pin). (Following on read cycle, write operation can be performed by setting
control bits in the write mode at the shift clock pulse 1C and later with the CE pin held at the high level.)
Control bits
USAGES
1. Read Data
1A
2A
3A
4A
5A
6A
7A
8A
1B
2B
3B
4B
5B
6B
7B
8B
1C
2C
3C
R/W
AD
DT
A3
A2
A1
A0
—
—
—
D3
D2
D1
D0
R/W
AD
*
CE
SCLK
Input to
SIO pin
Output from
SIO pin
(Internal processing)
Reading to shift register
Writing to
address register
Setting of
control bits
Control bits
Address bits
(Hi-z)
(Hi-z)
(Hi-z)
Read data
Setting of
SIO pin in
output mode
Shifting data
Setting of SIO pin in
input mode
*
*
) In the above figure, the “
”mark indicates arbitrary data; the “—” mark indicates unknown data;
the mark indicates data which are available when the SIO pin is held at the high, low, or Hiz level ;
and the diagonaliy shaded area indicates high or low.
相關(guān)PDF資料
PDF描述
RS5C314 PrimeSTACK up to 1700V Half Bridge
RS5C316 MINIATURE POWER RELAY
RS5C316A ULTRA-COMPACT SERIAL ALARM REAL-TIME CLOCK ICs
RS5C316B ULTRA-COMPACT SERIAL ALARM REAL-TIME CLOCK ICs
RS5C317A ULTRA-COMPACT HIGH PERFORMANCE SERIAL REAL-TIME CLOCK ICs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RS5C314 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:ULTRA-COMPACT REAL-TIME CLOCK IC
RS5C316 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:ULTRA-COMPACT SERIAL ALARM REAL-TIME CLOCK ICs
RS5C316A 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:ULTRA-COMPACT SERIAL ALARM REAL-TIME CLOCK ICs
RS5C316A/B 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:real-time clock ICs
RS5C316B 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:ULTRA-COMPACT SERIAL ALARM REAL-TIME CLOCK ICs
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*