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PRODUCT SPECIFICATION
RC7315
6
AC Electrical Characteristics
V
CC
= 10V
±
3%, V
EE
= -5.2V
±
5%, T
A
= 25
°
C (still air) and the load is a 50
W
transmission line with 2.0 ns one-way
delay, unless otherwise specified. The transmission line is back-terminated in 50
W
(
±
5%) using an external resistor.
The measurement probe is a high impedance FET probe with capacitance no greater than 3 pF and resistance no
smaller than 10 k
W
.
Symbol
SLR
Parameters
Slew Rate
(Slew rate not adjusted)
Test Conditions
V
H
- V
L
= 5V; Measured
between 20% and 80% points.
With probe only as load
With probe and transmission
line
Load is Probe Only;
V
A
= 1V (20% to 80%)
V
A
= 3V (10% to 90%)
V
A
= 5V (10% to 90%)
Amplitude = 0.8 Vp-p
Amplitude = 5.0 Vp-p
f = 10 MHz; V
OH
= +0.4V;
V
OL
= -0.4V
f = 10 MHz; V
OH
= +0.4V;
V
OL
= -0.4V
It
PLH
- t
PHL
I
Min.
Typ.
Max.
Units
1.3
1.8
V/ns
1.2
1.7
V/ns
t
R
,
t
F
Rise Time, and
Fall Time
(Slew rate not adjusted)
0.6
1.6
2.5
ns
ns
ns
MHz
MHz
f
Toggle Rate
Low to High Propagation Delay
250
125
t
PLH
1.6
ns
t
PHL
High to Low Propagation Delay
1.4
200
2
ns
ps
D
t
P
t
P
TC
Propagation Delay Match
Propagation Delay Temperature
Coefficient
Minimum Pulse Width
ps/
°
C
tPW
min
V
H
- V
L
- 2.0V; pulsewidth
at which amplitude drops by
50 mV, measured between 50%
points.
2 ns < PW < 98 ns;
f = 10 MHz; V
OH
= +0.4V;
V
OL
= -0.4V
0.5V < V
A
< 5.0V
2.0
ns
D
t
P
PW
Propagation Delay Variation with
Pulse Width
±
75
ps
t
PS
Preshoot
15mV
+ 3% of
V
A
50mV
+ 4% of
V
A
t
OS
Overshoot
0.5V < V
A
< 5.0V
t
S
Output Settling Time
V
A
< 5V;
To within 3% of V
A
To within 1% of V
A
V
OH
= 1V; V
OL
= -1V
Load = 100
W
// 15pF
8
10
2.9
ns
ns
ns
t
PHZ
Propagation Delay from Logic
High to Inhibit Mode
Propagation Delay from Logic
Low to Inhibit Mode
Propagation Delay from Inhibit
Mode from Logic High
Propagation Delay from Inhibit
Mode to Logic Low
Output capacitance in Inhibit
Mode
Propagation delay is measured
to the point at which voltage has
changed by 200 mV.
t
PLZ
2.9
ns
t
PZH
2.9
ns
t
PZL
2.9
ns
C
Z
3
pF