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Intel PXA270 Processor
Contents
Electrical, Mechanical, and Thermal Specification
v
6-1132-Bit Non-burst ROM, SRAM, or Flash Read Timing.....................................6-20
6-1232-Bit Burst-of-Eight ROM or Flash Read Timing............................................6-21
6-13Eight-Beat Burst Read from 16-Bit Burst-of-Four ROM or Flash Timing..........6-22
6-1416-bit ROM/Flash/SRAM Read for 4/2/1 Bytes Timing....................................6-23
6-15Synchronous Flash Burst-of-Eight Read Timing..............................................6-26
6-16Synchronous Flash Stacked Burst-of-Eight Read Timing................................6-27
6-17First-Access Latency Configuration Timing......................................................6-28
6-18Synchronous Flash Burst Read Example.........................................................6-30
6-1932-Bit Flash Write Timing.................................................................................6-31
6-2032-Bit Stacked Flash Write Timing...................................................................6-32
6-2116-Bit Flash Write Timing.................................................................................6-33
6-2232-Bit SRAM Write Timing ...............................................................................6-35
6-2316-bit SRAM Write for 4/2/1 Byte(s) Timing.....................................................6-36
6-2432-Bit VLIO Read Timing .................................................................................6-38
6-2532-Bit VLIO Write Timing..................................................................................6-39
6-26Expansion-Card Memory or I/O 16-Bit Access Timing.....................................6-41
6-27Expansion-Card Memory or I/O 16-Bit Access to 8-Bit Device Timing ............6-42
6-28LCD Timing Definitions.....................................................................................6-43
6-29SSP Master Mode Timing Definitions...............................................................6-44
6-30SSP Slave Mode Transmitting Data to an External Peripheral........................6-44
6-31SSP Slave Mode Receiving Data from External Peripheral.............................6-45
6-32JTAG Boundary-Scan Timing...........................................................................6-46
Tables
1-1 Supplemental Documentation............................................................................1-2
3-1 Processor Material Properties............................................................................3-7
4-1 Pin Usage Summary ........................................................................................4-10
4-2 Pin Usage and Mapping Notes.........................................................................4-27
4-3 Signal Types.....................................................................................................4-28
4-4 Memory Controller Pin Reset Values...............................................................4-28
4-5 Discrete (13x13 VF-BGA) Power Supply Pin Summary...................................4-29
5-1 Absolute Maximum Ratings................................................................................5-1
5-2 Voltage, Temperature, and Frequency Electrical Specifications........................5-2
5-3 Memory Voltage and Frequency Electrical Specifications .................................5-4
5-4 Core Voltage and Frequency Electrical Specifications.......................................5-4
5-5 Internally Generated Power Domain Descriptions .............................................5-6
5-6 Core Voltage Specifications For Lower Power Modes.......................................5-6
5-7 Power-Consumption Specifications....................................................................5-7
5-8 Standard Input, Output, and I/O Pin DC Operating Conditions..........................5-8
5-9 Typical 32.768-kHz Crystal Requirements.........................................................5-9
5-10 Typical External 32.768-kHz Oscillator Requirements....................................5-11
5-11Typical 13.000-MHz Crystal Requirements......................................................5-11
5-12Typical External 13.000-MHz Oscillator Requirements....................................5-12
5-13CLK_PIO Specifications...................................................................................5-12
5-14CLK_TOUT Specifications ...............................................................................5-12
5-1548 MHz Output Specifications..........................................................................5-13
6-1 Standard Input, Output, and I/O-Pin AC Operating Conditions..........................6-1
6-2 Power-On Timing Specifications (OSCC[CRI] = 0)............................................6-3
6-3 Hardware Reset Timing Specifications (OSCC[CRI] = 0) ..................................6-4
6-4 Hardware Reset Timing Specifications (OSCC[CRI] = 1) .................................6-5